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T8b949e; PlatformIO Project Configuration File
T8b949e;
T8b949e; Build options: build flags, source filter
T8b949e; Upload options: custom upload port, speed and extra flags
T8b949e; Library options: dependencies, extra library storages
T8b949e; Advanced options: extra scripting
T8b949e;
T8b949e; Please visit documentation for the other options and examples
T8b949e; https://docs.platformio.org/page/projectconf.html

Tff7b72[platformio]
Te6edf3default_envs Tff7b72=
Te6edf3rnode-ng-20
Te6edf3rnode-ng-21
Te6edf3ttgo-t-beam
Te6edf3ttgo-t-beam-sx1262
Te6edf3ttgo-t-beam-supreme
Te6edf3lilygo-t3-s3
Te6edf3lilygo-t3-s3-sx127x
Te6edf3lilygo-t3-s3-sx1280-pa
Te6edf3lilygo-t-deck
Te6edf3ttgo-lora32-v1
Te6edf3ttgo-lora32-v2
Te6edf3ttgo-lora32-v2-extled
Te6edf3ttgo-lora32-v21
Te6edf3ttgo-lora32-v21-extled
Te6edf3ttgo-lora32-v21-tcxo
Te6edf3heltec_wifi_lora_32_V2
Te6edf3heltec_wifi_lora_32_V2-extled
Te6edf3heltec_wifi_lora_32_V3
Te6edf3heltec_wifi_lora_32_V4
Te6edf3heltec-wireless-tracker-v2
Te6edf3featheresp32
Te6edf3seeed_xiao_esp32s3
Te6edf3generic-esp32
Te6edf3wiscore_rak4631
Te6edf3wiscore_rak3401
Te6edf3lilygo-t-echo
T8b949e; Change source and include directories to root of project since RNode places them here
Te6edf3include_dir Tff7b72= Ta5d6ff.
Te6edf3src_dir Tff7b72= Ta5d6ff.

Tff7b72[env]
Te6edf3debug_build_flags Tff7b72= Ta5d6ff-Os
Te6edf3build_unflags Tff7b72=
Te6edf3-stdTff7b72=Ta5d6ffgnu++11
Te6edf3-fno-exceptions
Te6edf3build_flags Tff7b72=
Te6edf3-stdTff7b72=Ta5d6ffgnu++17
Te6edf3-fexceptions
T8b949e;-O3
Te6edf3-O0
Te6edf3-Wall
T8b949e;-Wextra
Te6edf3-Wno-missing-field-initializers -Wno-format
Te6edf3-I.
T8b949e; CBA Define following to disable DEBUG build
Te6edf3-DNDEBUG
T8b949e; CBA Define following to include RNS stack
Te6edf3-DHAS_RNS
T8b949e; Enable microReticulum Provisioning subsystem (namespaced config engine,
T8b949e; KISS-multiplexed wire protocol, persistent storage). Inherits HAS_RNS
T8b949e; — both must be on for the feature to compile in.
Te6edf3-DHAS_PROVISIONING
Te6edf3-DRNS_USE_PROVISIONING
Te6edf3-DRNS_ENABLE_REMOTE_PROVISIONING
T8b949e; LoRa modem driver + LoRaInterface registration with RNS Transport.
T8b949e; Inherited by all embedded envs and [env:native]. [env:native-macos]
T8b949e; removes it via build_unflags so the macOS dev binary launches with
T8b949e; no Reticulum interfaces (UDPInterface can be added later).
Te6edf3-DLORA_TRANSPORT
Te6edf3-DRNS_LOG_LEVELTff7b72=Ta5d6ffRNS_LOG_LEVEL_TRACE T8b949e; Set maximum supported log verbosity to TRACE
Te6edf3-DRNS_LOW_MEMORY_REBOOT ; Automatically reboot device if memory consumption exceeds 98%
T8b949e;-DRNS_DEBUG_HEAP ; Enable heap debug logs
T8b949e;-DRNS_DEBUG_MEMORY ; Enable memory debug logs
T8b949e;-DRNS_DEBUG_METRICS ; Enable stack metrics logs
T8b949e;-DRNS_DEBUG_PATHSTORE ; Enable path store metrics logs
Te6edf3-DRNS_USE_FS ; Enable filesystem utilization
Te6edf3-DURTN_STATS_PAGES ; Enable NomadNet stats pages
Te6edf3-DMSGPACK_USE_BOOSTTff7b72=Ta5d6ffOFF
Te6edf3-DDEBUGLOG_DEFAULT_LOG_LEVEL_ERROR
T8b949e; CBA Define following to disable LFS asserts
T8b949e;-DLFS_NO_ASSERT
T8b949e; ???
T8b949e;-DLFS_YES_TRACE
T8b949e; ???
T8b949e;-DCORE_DEBUG_LEVEL=5
T8b949e; ??? NO
T8b949e;-DLOG_LOCAL_LEVEL=5
T8b949e;-DCONFIG_LOG_DEFAULT_LEVEL=5
Te6edf3lib_deps Tff7b72=
Te6edf3ArduinoJson@^7.4.2
Te6edf3MsgPack@^0.4.2
Te6edf3httpsTff7b72:Ta5d6ff//github.com/attermann/Crypto.git
T8b949e;https://github.com/attermann/microStore.git
T8b949e;https://github.com/attermann/microReticulum.git
T8b949e; Exclude directories in root from sources. native/ is only built by the
T8b949e; native-* envs (they re-add it via +<native/>) — keeping it out of the
T8b949e; default filter prevents native/PinMap.cpp's EEPROM shim from colliding
T8b949e; with the Arduino-ESP32 framework's EEPROM global on embedded builds.
T8b949e;build_src_filter = +<*> -<variants/> -<native/>
T8b949e; Only include cpp/ino files (currenty no subdirectories)
Te6edf3build_src_filter Tff7b72= Ta5d6ff-<*> +<*.ino> +<*.cpp>
Te6edf3extra_scripts Tff7b72= Ta5d6ffpre:extra_script.py

T8b949e; For embedded environments (ESP32 and NRF52)
Tff7b72[env:embedded]
Te6edf3framework Tff7b72= Ta5d6ffarduino
Te6edf3monitor_speed Tff7b72= Ta5d6ff115200
T8b949e;upload_speed = 460800
Te6edf3build_unflags Tff7b72=
Te6edf3${env.build_unflags}
Te6edf3-stdTff7b72=Ta5d6ffgnu++11
T8b949e;-fno-rtti
Te6edf3build_flags Tff7b72=
Te6edf3${env.build_flags}
Te6edf3-stdTff7b72=Ta5d6ffgnu++17
T8b949e; Enable the KISS-over-WebSocket console alongside the existing HTTP
T8b949e; console. WebSocketServer.h adds a secondary __has_include(<WiFi.h>)
T8b949e; gate, so nRF52 envs that inherit this section but lack WiFi.h fall
T8b949e; through cleanly without compiling any WS code.
T8b949e;-DENABLE_WEBSOCKETS
T8b949e;-Inative/ws_shims
T8b949e; The WebSocket shims (vendored SHA-1 + base64) live under native/ws_shims/
T8b949e; but are needed on every WiFi-capable target. Pull them into the embedded
T8b949e; build filter so ESP32 sub-envs compile them; native envs already include
T8b949e; the whole `native/` tree via their own filter extension.
Te6edf3build_src_filter Tff7b72=
Te6edf3${env.build_src_filter}
Te6edf3+<native/ws_shims/>
Te6edf3lib_deps Tff7b72=
Te6edf3${env.lib_deps}
Te6edf3adafruit/Adafruit SSD1306@^2.5.9

T8b949e; For all ESP32 environments
Tff7b72[env:embedded-esp32]
Te6edf3extends Tff7b72= Ta5d6ffenv:embedded
Te6edf3build_unflags Tff7b72=
Te6edf3${envTff7b72:Ta5d6ffembedded.build_unflags}
Te6edf3-Og ; OptimizationTff7b72: Ta5d6ffremoves pio-added optimization flag
Te6edf3-DRNS_LOG_LEVELTff7b72=Ta5d6ffRNS_LOG_LEVEL_TRACE
Te6edf3build_flags Tff7b72=
Te6edf3${envTff7b72:Ta5d6ffembedded.build_flags}

T8b949e; For constrained ESP32 environments
Tff7b72[env:embedded-esp32-minimal]
Te6edf3extends Tff7b72= Ta5d6ffenv:embedded-esp32
Te6edf3build_unflags Tff7b72=
Te6edf3${envTff7b72:Ta5d6ffembedded-esp32.build_unflags}
Te6edf3-Og ; OptimizationTff7b72: Ta5d6ffremoves pio-added optimization flag
Te6edf3-DRNS_LOG_LEVELTff7b72=Ta5d6ffRNS_LOG_LEVEL_TRACE
Te6edf3build_flags Tff7b72=
Te6edf3${envTff7b72:Ta5d6ffembedded-esp32.build_flags}
Te6edf3-Os ; Size optimization (or -Oz if toolchain supports it)
Te6edf3-ffunction-sections ; Dead code elimination (pair with --gc-sections)
Te6edf3-fdata-sections ; Dead data elimination
Te6edf3-Wl,--gc-sections ; LinkerTff7b72: Ta5d6ffdiscard unused sections
Te6edf3-fno-inline-functions
Te6edf3-fno-inline-small-functions
Te6edf3-fno-use-cxa-atexit
Te6edf3-fmerge-all-constants
T8b949e;-flto ; Link-time optimization
Te6edf3-Wall
Te6edf3-Wno-missing-field-initializers
Te6edf3-Wno-format
T8b949e;-DHAS_PROVISIONING
T8b949e;-DRNS_LOG_LEVEL=RNS_LOG_LEVEL_DEBUG ; Lower maximum supported log verbosity to DEBUG to reduce firmware size
Te6edf3-DRNS_LOG_LEVELTff7b72=Ta5d6ffRNS_LOG_LEVEL_VERBOSE T8b949e; Lower maximum supported log verbosity to VERBOSE to reduce firmware size
Te6edf3lib_deps Tff7b72=
Te6edf3${envTff7b72:Ta5d6ffembedded.lib_deps}
Te6edf3WiFi@^2.0.0

T8b949e; For all NRF52 environments
Tff7b72[env:embedded-nrf52]
Te6edf3extends Tff7b72= Ta5d6ffenv:embedded
Te6edf3build_unflags Tff7b72=
Te6edf3${envTff7b72:Ta5d6ffembedded.build_unflags}
Te6edf3-fno-exceptions ; Required for exception handling on nordicnrf52
Te6edf3-fno-rtti ; Required for exception handling on nordicnrf52
Te6edf3--specsTff7b72=Ta5d6ffnano.specs T8b949e; Required for exception handling on nordicnrf52
Te6edf3build_flags Tff7b72=
Te6edf3${envTff7b72:Ta5d6ffembedded.build_flags}
Te6edf3-fexceptions ; Required for exception handling on nordicnrf52
Te6edf3-frtti ; Required for exception handling on nordicnrf52
Te6edf3--specsTff7b72=Ta5d6ffnosys.specs T8b949e; Required for exception handling on nordicnrf52
Te6edf3-Wl,--wrapTff7b72=Ta5d6ff_write T8b949e; Route newlib printf/_write hook to __wrap__write in RNode_Firmware.ino (Adafruit nRF52 core also defines _write in its main.cpp; wrapping avoids "multiple definition")

T8b949e; For constrained NRF52 environments
Tff7b72[env:embedded-nrf52-minimal]
Te6edf3extends Tff7b72= Ta5d6ffenv:embedded-nrf52
Te6edf3build_unflags Tff7b72=
Te6edf3${envTff7b72:Ta5d6ffembedded-nrf52.build_unflags}
Te6edf3-Og ; OptimizationTff7b72: Ta5d6ffremoves pio-added optimization flag
T8b949e;-DRNS_LOG_LEVEL=RNS_LOG_LEVEL_TRACE
Te6edf3build_flags Tff7b72=
Te6edf3${envTff7b72:Ta5d6ffembedded-nrf52.build_flags}
Te6edf3-Os ; Optimization
Te6edf3-fno-inline-functions ; Optimization
Te6edf3-fno-inline-small-functions ; Optimization
Te6edf3-fno-use-cxa-atexit ; Optimization
Te6edf3-fmerge-all-constants ; Optimization
T8b949e;-DHAS_PROVISIONING
T8b949e;-DRNS_LOG_LEVEL=RNS_LOG_LEVEL_DEBUG ; Lower maximum supported log verbosity to DEBUG to reduce firmware size
T8b949e;-DRNS_LOG_LEVEL=RNS_LOG_LEVEL_VERBOSE ; Lower maximum supported log verbosity to VERBOSE to reduce firmware size
Te6edf3-DDISABLE_IA ; Disabling interference avoidance on nRF52 platforms because it is fragile and causes nodes to stop transmitting

Tff7b72[env:rnode-ng-20]
Te6edf3extends Tff7b72= Ta5d6ffenv:embedded-esp32-minimal
Te6edf3platform Tff7b72= Ta5d6ffespressif32
Te6edf3board Tff7b72= Ta5d6ffttgo-lora32-v2
Te6edf3custom_variant Tff7b72= Ta5d6ffng20
Te6edf3board_build.partitions Tff7b72= Ta5d6ffno_ota.csv
Te6edf3board_build.filesystem Tff7b72= Ta5d6fflittlefs
Te6edf3build_unflags Tff7b72=
Te6edf3${envTff7b72:Ta5d6ffembedded-esp32-minimal.build_unflags}
Te6edf3build_flags Tff7b72=
Te6edf3${envTff7b72:Ta5d6ffembedded-esp32-minimal.build_flags}
Te6edf3-DBOARD_MODELTff7b72=Ta5d6ffBOARD_RNODE_NG_20
Te6edf3-DUSTORE_USE_POSIXFSTff7b72=Ta5d6ff1
Te6edf3-DURTN_PATH_TABLE_MAX_RECSTff7b72=Ta5d6ff500
Te6edf3-DRNS_PATH_TABLE_SEGMENT_SIZETff7b72=Ta5d6ff24576 T8b949e; 24 KB
Te6edf3-DRNS_PATH_TABLE_SEGMENT_COUNTTff7b72=Ta5d6ff8
Te6edf3lib_deps Tff7b72=
Te6edf3${envTff7b72:Ta5d6ffembedded-esp32.lib_deps}
Te6edf3XPowersLib@^0.2.1
Te6edf3adafruit/Adafruit NeoPixel@^1.12.0
Te6edf3httpsTff7b72:Ta5d6ff//github.com/attermann/microStore.git
Te6edf3httpsTff7b72:Ta5d6ff//github.com/attermann/microReticulum.git

Tff7b72[env:rnode-ng-21]
Te6edf3extends Tff7b72= Ta5d6ffenv:embedded-esp32-minimal
Te6edf3platform Tff7b72= Ta5d6ffespressif32
Te6edf3board Tff7b72= Ta5d6ffttgo-lora32-v21
Te6edf3custom_variant Tff7b72= Ta5d6ffng21
Te6edf3board_build.partitions Tff7b72= Ta5d6ffno_ota.csv
Te6edf3board_build.filesystem Tff7b72= Ta5d6fflittlefs
Te6edf3build_unflags Tff7b72=
Te6edf3${envTff7b72:Ta5d6ffembedded-esp32-minimal.build_unflags}
Te6edf3build_flags Tff7b72=
Te6edf3${envTff7b72:Ta5d6ffembedded-esp32-minimal.build_flags}
Te6edf3-DBOARD_MODELTff7b72=Ta5d6ffBOARD_RNODE_NG_21
Te6edf3-DUSTORE_USE_POSIXFSTff7b72=Ta5d6ff1
Te6edf3-DURTN_PATH_TABLE_MAX_RECSTff7b72=Ta5d6ff500
Te6edf3-DRNS_PATH_TABLE_SEGMENT_SIZETff7b72=Ta5d6ff24576 T8b949e; 24 KB
Te6edf3-DRNS_PATH_TABLE_SEGMENT_COUNTTff7b72=Ta5d6ff8
Te6edf3lib_deps Tff7b72=
Te6edf3${envTff7b72:Ta5d6ffembedded-esp32.lib_deps}
Te6edf3XPowersLib@^0.2.1
Te6edf3adafruit/Adafruit NeoPixel@^1.12.0
Te6edf3httpsTff7b72:Ta5d6ff//github.com/attermann/microStore.git
Te6edf3httpsTff7b72:Ta5d6ff//github.com/attermann/microReticulum.git

T8b949e; MCU: ESP32 (ESP32-D0WDQ6)
T8b949e; SRAM: 520 KB
T8b949e; PSRAM: 8 MB
T8b949e; Flash: 4 MB
T8b949e; External Flash Interface: N/A
T8b949e; LoRa: Semtech SX1276
Tff7b72[env:ttgo-t-beam]
Te6edf3extends Tff7b72= Ta5d6ffenv:embedded-esp32-minimal
Te6edf3platform Tff7b72= Ta5d6ffespressif32
Te6edf3board Tff7b72= Ta5d6ffttgo-t-beam
Te6edf3custom_variant Tff7b72= Ta5d6fftbeam
Te6edf3board_build.partitions Tff7b72= Ta5d6ffno_ota.csv T8b949e; 2MB Firmware / 2MB Filesystem
T8b949e;board_build.partitions = huge_app.csv ; 3MB Firmware / 1MB Filesystem
Te6edf3board_build.filesystem Tff7b72= Ta5d6fflittlefs
Te6edf3build_unflags Tff7b72=
Te6edf3${envTff7b72:Ta5d6ffembedded-esp32-minimal.build_unflags}
Te6edf3build_flags Tff7b72=
Te6edf3${envTff7b72:Ta5d6ffembedded-esp32-minimal.build_flags}
Te6edf3-DBOARD_MODELTff7b72=Ta5d6ffBOARD_TBEAM
Te6edf3-DDISABLE_CONSOLE ; Optimization to fit firmware within available flash
Te6edf3-DBOARD_HAS_PSRAMTff7b72=Ta5d6ff1
Te6edf3-DRNS_CONTAINER_ALLOCATORTff7b72=Ta5d6ffRNS_PSRAM_ALLOCATOR
Te6edf3-DUSTORE_USE_POSIXFSTff7b72=Ta5d6ff1
Te6edf3-DURTN_PATH_TABLE_MAX_RECSTff7b72=Ta5d6ff500
Te6edf3-DRNS_PATH_TABLE_SEGMENT_SIZETff7b72=Ta5d6ff24576 T8b949e; 24 KB
Te6edf3-DRNS_PATH_TABLE_SEGMENT_COUNTTff7b72=Ta5d6ff8
Te6edf3lib_deps Tff7b72=
Te6edf3${envTff7b72:Ta5d6ffembedded-esp32.lib_deps}
Te6edf3XPowersLib@^0.2.1
Te6edf3httpsTff7b72:Ta5d6ff//github.com/attermann/microStore.git
Te6edf3httpsTff7b72:Ta5d6ff//github.com/attermann/microReticulum.git

T8b949e; MCU: ESP32 (ESP32-D0WDQ6)
T8b949e; SRAM: 520 KB
T8b949e; PSRAM: 8 MB
T8b949e; Flash: 4 MB
T8b949e; External Flash Interface: N/A
T8b949e; LoRa: Semtech SX1262
Tff7b72[env:ttgo-t-beam-sx1262]
Te6edf3extends Tff7b72= Ta5d6ffenv:embedded-esp32-minimal
Te6edf3platform Tff7b72= Ta5d6ffespressif32
Te6edf3board Tff7b72= Ta5d6ffttgo-t-beam
Te6edf3custom_variant Tff7b72= Ta5d6fftbeam_sx1262
Te6edf3board_build.partitions Tff7b72= Ta5d6ffno_ota.csv
Te6edf3board_build.filesystem Tff7b72= Ta5d6fflittlefs
Te6edf3build_unflags Tff7b72=
Te6edf3${envTff7b72:Ta5d6ffembedded-esp32-minimal.build_unflags}
Te6edf3build_flags Tff7b72=
Te6edf3${envTff7b72:Ta5d6ffembedded-esp32-minimal.build_flags}
Te6edf3-DBOARD_MODELTff7b72=Ta5d6ffBOARD_TBEAM
Te6edf3-DDISABLE_CONSOLE ; Optimization to fit firmware within available flash
Te6edf3-DMODEMTff7b72=Ta5d6ffSX1262
Te6edf3-DBOARD_HAS_PSRAMTff7b72=Ta5d6ff1
Te6edf3-DRNS_CONTAINER_ALLOCATORTff7b72=Ta5d6ffRNS_PSRAM_ALLOCATOR
Te6edf3-DUSTORE_USE_POSIXFSTff7b72=Ta5d6ff1
Te6edf3-DURTN_PATH_TABLE_MAX_RECSTff7b72=Ta5d6ff500
Te6edf3-DRNS_PATH_TABLE_SEGMENT_SIZETff7b72=Ta5d6ff24576 T8b949e; 24 KB
Te6edf3-DRNS_PATH_TABLE_SEGMENT_COUNTTff7b72=Ta5d6ff8
Te6edf3lib_deps Tff7b72=
Te6edf3${envTff7b72:Ta5d6ffembedded-esp32.lib_deps}
Te6edf3XPowersLib@^0.2.1
Te6edf3httpsTff7b72:Ta5d6ff//github.com/attermann/microStore.git
Te6edf3httpsTff7b72:Ta5d6ff//github.com/attermann/microReticulum.git

T8b949e; MCU: ESP32-S3FN8 Dual-core LX7
T8b949e; SRAM: 520 KB
T8b949e; PSRAM: 8 MB
T8b949e; Flash: 8 MB (some variants 16 MB)
T8b949e; External Flash Interface: N/A
T8b949e; LoRa: Semtech SX1262
Tff7b72[env:ttgo-t-beam-supreme]
Te6edf3extends Tff7b72= Ta5d6ffenv:embedded
Te6edf3platform Tff7b72= Ta5d6ffespressif32
Te6edf3board Tff7b72= Ta5d6fft-beams3-supreme
Te6edf3custom_variant Tff7b72= Ta5d6fftbeam_supreme
T8b949e;board_build.partitions = no_ota.csv
Te6edf3board_upload.flash_size Tff7b72= Ta5d6ff8MB
Te6edf3board_upload.maximum_size Tff7b72= Ta5d6ff8388608
Te6edf3board_build.partitions Tff7b72= Ta5d6ffdefault_8MB.csv
Te6edf3board_build.filesystem Tff7b72= Ta5d6fflittlefs
Te6edf3build_flags Tff7b72=
Te6edf3${envTff7b72:Ta5d6ffembedded.build_flags}
Te6edf3-DBOARD_MODELTff7b72=Ta5d6ffBOARD_TBEAM_S_V1
Te6edf3-DMODEMTff7b72=Ta5d6ffSX1262
Te6edf3-DBOARD_HAS_PSRAMTff7b72=Ta5d6ff1
Te6edf3-DRNS_CONTAINER_ALLOCATORTff7b72=Ta5d6ffRNS_PSRAM_ALLOCATOR
Te6edf3-DUSTORE_USE_POSIXFSTff7b72=Ta5d6ff1
Te6edf3-DURTN_PATH_TABLE_MAX_RECSTff7b72=Ta5d6ff2000
Te6edf3-DRNS_PATH_TABLE_SEGMENT_SIZETff7b72=Ta5d6ff98304 T8b949e; 96 KB
Te6edf3-DRNS_PATH_TABLE_SEGMENT_COUNTTff7b72=Ta5d6ff8
Te6edf3lib_deps Tff7b72=
Te6edf3${envTff7b72:Ta5d6ffembedded-esp32.lib_deps}
Te6edf3XPowersLib@^0.2.1
Te6edf3Adafruit_SH110X
Te6edf3adafruit/Adafruit SH110X@^2.1.14
Te6edf3httpsTff7b72:Ta5d6ff//github.com/attermann/microStore.git
Te6edf3httpsTff7b72:Ta5d6ff//github.com/attermann/microReticulum.git

T8b949e; MCU: ESP32-S3
T8b949e; SRAM: 512 KB
T8b949e; PSRAM: 2 MB
T8b949e; Flash: 4 MB (QSPI)
T8b949e; External Flash Interface: N/A
T8b949e; LoRa: Semtech SX1262
Tff7b72[env:lilygo-t3-s3]
Te6edf3extends Tff7b72= Ta5d6ffenv:embedded
Te6edf3platform Tff7b72= Ta5d6ffespressif32
Te6edf3board Tff7b72= Ta5d6fflilygo-t3-s3
Te6edf3custom_variant Tff7b72= Ta5d6fft3s3
Te6edf3board_build.partitions Tff7b72= Ta5d6ffno_ota.csv
Te6edf3board_build.filesystem Tff7b72= Ta5d6fflittlefs
Te6edf3build_flags Tff7b72=
Te6edf3${envTff7b72:Ta5d6ffembedded.build_flags}
Te6edf3-DBOARD_MODELTff7b72=Ta5d6ffBOARD_T3S3
Te6edf3-DMODEMTff7b72=Ta5d6ffSX1262
Te6edf3-DBOARD_HAS_PSRAMTff7b72=Ta5d6ff1
Te6edf3-DRNS_CONTAINER_ALLOCATORTff7b72=Ta5d6ffRNS_PSRAM_ALLOCATOR
Te6edf3-DUSTORE_USE_POSIXFSTff7b72=Ta5d6ff1
Te6edf3-DURTN_PATH_TABLE_MAX_RECSTff7b72=Ta5d6ff2000
Te6edf3-DRNS_PATH_TABLE_SEGMENT_SIZETff7b72=Ta5d6ff98304 T8b949e; 96 KB
Te6edf3-DRNS_PATH_TABLE_SEGMENT_COUNTTff7b72=Ta5d6ff8
Te6edf3lib_deps Tff7b72=
Te6edf3${envTff7b72:Ta5d6ffembedded-esp32.lib_deps}
Te6edf3XPowersLib@^0.2.1
Te6edf3httpsTff7b72:Ta5d6ff//github.com/attermann/microStore.git
Te6edf3httpsTff7b72:Ta5d6ff//github.com/attermann/microReticulum.git

T8b949e; MCU: ESP32-S3
T8b949e; SRAM: 512 KB
T8b949e; PSRAM: 8 MB (common configuration)
T8b949e; Flash: 16 MB typical
T8b949e; External Flash Interface: N/A
T8b949e; LoRa: Semtech SX1276/SX1278
Tff7b72[env:lilygo-t3-s3-sx127x]
Te6edf3extends Tff7b72= Ta5d6ffenv:embedded
Te6edf3platform Tff7b72= Ta5d6ffespressif32
Te6edf3board Tff7b72= Ta5d6fflilygo-t3-s3
Te6edf3custom_variant Tff7b72= Ta5d6fft3s3_sx127x
Te6edf3board_build.partitions Tff7b72= Ta5d6ffno_ota.csv
Te6edf3board_build.filesystem Tff7b72= Ta5d6fflittlefs
Te6edf3build_flags Tff7b72=
Te6edf3${envTff7b72:Ta5d6ffembedded.build_flags}
Te6edf3-DBOARD_MODELTff7b72=Ta5d6ffBOARD_T3S3
Te6edf3-DMODEMTff7b72=Ta5d6ffSX1276
Te6edf3-DBOARD_HAS_PSRAMTff7b72=Ta5d6ff1
Te6edf3-DRNS_CONTAINER_ALLOCATORTff7b72=Ta5d6ffRNS_PSRAM_ALLOCATOR
Te6edf3-DUSTORE_USE_POSIXFSTff7b72=Ta5d6ff1
Te6edf3-DURTN_PATH_TABLE_MAX_RECSTff7b72=Ta5d6ff2000
Te6edf3-DRNS_PATH_TABLE_SEGMENT_SIZETff7b72=Ta5d6ff98304 T8b949e; 96 KB
Te6edf3-DRNS_PATH_TABLE_SEGMENT_COUNTTff7b72=Ta5d6ff8
Te6edf3lib_deps Tff7b72=
Te6edf3${envTff7b72:Ta5d6ffembedded-esp32.lib_deps}
Te6edf3XPowersLib@^0.2.1
Te6edf3httpsTff7b72:Ta5d6ff//github.com/attermann/microStore.git
Te6edf3httpsTff7b72:Ta5d6ff//github.com/attermann/microReticulum.git

T8b949e; MCU: ESP32-S3
T8b949e; SRAM: 512 KB
T8b949e; PSRAM: 8 MB (common configuration)
T8b949e; Flash: 16 MB typical
T8b949e; External Flash Interface: N/A
T8b949e; LoRa: Semtech SX1280
Tff7b72[env:lilygo-t3-s3-sx1280-pa]
Te6edf3extends Tff7b72= Ta5d6ffenv:embedded
Te6edf3platform Tff7b72= Ta5d6ffespressif32
Te6edf3board Tff7b72= Ta5d6fflilygo-t3-s3
Te6edf3custom_variant Tff7b72= Ta5d6fft3s3_sx1280_pa
Te6edf3board_build.partitions Tff7b72= Ta5d6ffno_ota.csv
Te6edf3board_build.filesystem Tff7b72= Ta5d6fflittlefs
Te6edf3build_flags Tff7b72=
Te6edf3${envTff7b72:Ta5d6ffembedded.build_flags}
Te6edf3-DBOARD_MODELTff7b72=Ta5d6ffBOARD_T3S3
Te6edf3-DMODEMTff7b72=Ta5d6ffSX1280
Te6edf3-DBOARD_HAS_PSRAMTff7b72=Ta5d6ff1
Te6edf3-DRNS_CONTAINER_ALLOCATORTff7b72=Ta5d6ffRNS_PSRAM_ALLOCATOR
Te6edf3-DUSTORE_USE_POSIXFSTff7b72=Ta5d6ff1
Te6edf3-DURTN_PATH_TABLE_MAX_RECSTff7b72=Ta5d6ff2000
Te6edf3-DRNS_PATH_TABLE_SEGMENT_SIZETff7b72=Ta5d6ff98304 T8b949e; 96 KB
Te6edf3-DRNS_PATH_TABLE_SEGMENT_COUNTTff7b72=Ta5d6ff8
Te6edf3lib_deps Tff7b72=
Te6edf3${envTff7b72:Ta5d6ffembedded-esp32.lib_deps}
Te6edf3XPowersLib@^0.2.1
Te6edf3httpsTff7b72:Ta5d6ff//github.com/attermann/microStore.git
Te6edf3httpsTff7b72:Ta5d6ff//github.com/attermann/microReticulum.git

T8b949e; MCU: ESP32-S3
T8b949e; SRAM: 512 KB
T8b949e; PSRAM: 8 MB
T8b949e; Flash: 16 MB
T8b949e; External Flash Interface: N/A
T8b949e; LoRa: Semtech SX1262
Tff7b72[env:lilygo-t-deck]
Te6edf3extends Tff7b72= Ta5d6ffenv:embedded
Te6edf3platform Tff7b72= Ta5d6ffespressif32
Te6edf3board Tff7b72= Ta5d6ffesp32-s3-devkitc-1
Te6edf3custom_variant Tff7b72= Ta5d6fftdeck
Te6edf3board_build.filesystem Tff7b72= Ta5d6fflittlefs
T8b949e; Flash / memory layout
Te6edf3board_upload.flash_size Tff7b72= Ta5d6ff16MB
Te6edf3board_upload.maximum_size Tff7b72= Ta5d6ff16777216
Te6edf3board_build.partitions Tff7b72= Ta5d6ffdefault_16MB.csv
T8b949e; Enable PSRAM + correct flash mode
Te6edf3board_build.flash_mode Tff7b72= Ta5d6ffqio
Te6edf3board_build.psram_type Tff7b72= Ta5d6ffopi
Te6edf3board_build.arduino.memory_type Tff7b72= Ta5d6ffqio_opi
Te6edf3build_flags Tff7b72=
Te6edf3${envTff7b72:Ta5d6ffembedded.build_flags}
Te6edf3-DBOARD_MODELTff7b72=Ta5d6ffBOARD_TDECK
Te6edf3-DBOARD_HAS_PSRAMTff7b72=Ta5d6ff1
Te6edf3-DARDUINO_USB_MODETff7b72=Ta5d6ff1
Te6edf3-DCORE_DEBUG_LEVELTff7b72=Ta5d6ff1
T8b949e; Enable UARDUINO_ USB_ CDC_ ON_ BOOT will start printing and wait for terminal access during startup
Te6edf3-DARDUINO_USB_CDC_ON_BOOTTff7b72=Ta5d6ff1
T8b949e; Enable UARDUINO_USB_CDC_ON_BOOT will turn off printing and will not block when using the battery
T8b949e; -UARDUINO_USB_CDC_ON_BOOT
Te6edf3-DRNS_CONTAINER_ALLOCATORTff7b72=Ta5d6ffRNS_PSRAM_ALLOCATOR
Te6edf3-DUSTORE_USE_POSIXFSTff7b72=Ta5d6ff1
Te6edf3-DURTN_PATH_TABLE_MAX_RECSTff7b72=Ta5d6ff2000
Te6edf3-DRNS_PATH_TABLE_SEGMENT_SIZETff7b72=Ta5d6ff98304 T8b949e; 96 KB
Te6edf3-DRNS_PATH_TABLE_SEGMENT_COUNTTff7b72=Ta5d6ff8
Te6edf3lib_deps Tff7b72=
Te6edf3${envTff7b72:Ta5d6ffembedded-esp32.lib_deps}
Te6edf3XPowersLib@^0.2.1
Te6edf3httpsTff7b72:Ta5d6ff//github.com/attermann/microStore.git
Te6edf3httpsTff7b72:Ta5d6ff//github.com/attermann/microReticulum.git

T8b949e; MCU: ESP32 (usually ESP32-D0WDQ6)
T8b949e; SRAM: 520 KB internal SRAM
T8b949e; Flash: 4 MB (sometimes 8 MB on newer batches)
T8b949e; PSRAM: N/A
T8b949e; External Flash Interface: N/A
T8b949e; LoRa: Semtech SX1276/SX1278
Tff7b72[env:ttgo-lora32-v1]
Te6edf3extends Tff7b72= Ta5d6ffenv:embedded-esp32-minimal
Te6edf3platform Tff7b72= Ta5d6ffespressif32
Te6edf3board Tff7b72= Ta5d6ffttgo-lora32-v1
Te6edf3custom_variant Tff7b72= Ta5d6fflora32v10
Te6edf3board_build.partitions Tff7b72= Ta5d6ffno_ota.csv
Te6edf3board_build.filesystem Tff7b72= Ta5d6fflittlefs
Te6edf3build_unflags Tff7b72=
Te6edf3${envTff7b72:Ta5d6ffembedded-esp32-minimal.build_unflags}
Te6edf3build_flags Tff7b72=
Te6edf3${envTff7b72:Ta5d6ffembedded-esp32-minimal.build_flags}
Te6edf3-DBOARD_MODELTff7b72=Ta5d6ffBOARD_LORA32_V1_0
Te6edf3-DUSTORE_USE_POSIXFSTff7b72=Ta5d6ff1
Te6edf3-DURTN_PATH_TABLE_MAX_RECSTff7b72=Ta5d6ff500
Te6edf3-DRNS_PATH_TABLE_SEGMENT_SIZETff7b72=Ta5d6ff24576 T8b949e; 24 KB
Te6edf3-DRNS_PATH_TABLE_SEGMENT_COUNTTff7b72=Ta5d6ff8
Te6edf3lib_deps Tff7b72=
Te6edf3${envTff7b72:Ta5d6ffembedded-esp32.lib_deps}
Te6edf3XPowersLib@^0.2.1
Te6edf3httpsTff7b72:Ta5d6ff//github.com/attermann/microStore.git
Te6edf3httpsTff7b72:Ta5d6ff//github.com/attermann/microReticulum.git

T8b949e; MCU: ESP32 (usually ESP32-D0WDQ6)
T8b949e; SRAM: 520 KB internal SRAM
T8b949e; Flash: 4 MB (sometimes 8 MB on newer batches)
T8b949e; PSRAM: N/A
T8b949e; External Flash Interface: N/A
T8b949e; LoRa: Semtech SX1276/SX1278
Tff7b72[env:ttgo-lora32-v2]
Te6edf3extends Tff7b72= Ta5d6ffenv:embedded-esp32-minimal
Te6edf3platform Tff7b72= Ta5d6ffespressif32
Te6edf3board Tff7b72= Ta5d6ffttgo-lora32-v2
Te6edf3custom_variant Tff7b72= Ta5d6fflora32v20
Te6edf3board_build.partitions Tff7b72= Ta5d6ffno_ota.csv
Te6edf3board_build.filesystem Tff7b72= Ta5d6fflittlefs
Te6edf3build_unflags Tff7b72=
Te6edf3${envTff7b72:Ta5d6ffembedded-esp32-minimal.build_unflags}
Te6edf3build_flags Tff7b72=
Te6edf3${envTff7b72:Ta5d6ffembedded-esp32-minimal.build_flags}
Te6edf3-DBOARD_MODELTff7b72=Ta5d6ffBOARD_LORA32_V2_0
Te6edf3-DUSTORE_USE_POSIXFSTff7b72=Ta5d6ff1
Te6edf3-DURTN_PATH_TABLE_MAX_RECSTff7b72=Ta5d6ff500
Te6edf3-DRNS_PATH_TABLE_SEGMENT_SIZETff7b72=Ta5d6ff24576 T8b949e; 24 KB
Te6edf3-DRNS_PATH_TABLE_SEGMENT_COUNTTff7b72=Ta5d6ff8
Te6edf3lib_deps Tff7b72=
Te6edf3${envTff7b72:Ta5d6ffembedded-esp32.lib_deps}
Te6edf3XPowersLib@^0.2.1
Te6edf3httpsTff7b72:Ta5d6ff//github.com/attermann/microStore.git
Te6edf3httpsTff7b72:Ta5d6ff//github.com/attermann/microReticulum.git

T8b949e; MCU: ESP32 (usually ESP32-D0WDQ6)
T8b949e; SRAM: 520 KB internal SRAM
T8b949e; Flash: 4 MB (sometimes 8 MB on newer batches)
T8b949e; PSRAM: N/A
T8b949e; External Flash Interface: N/A
T8b949e; LoRa: Semtech SX1276/SX1278
Tff7b72[env:ttgo-lora32-v2-extled]
Te6edf3extends Tff7b72= Ta5d6ffenv:embedded-esp32-minimal
Te6edf3platform Tff7b72= Ta5d6ffespressif32
Te6edf3board Tff7b72= Ta5d6ffttgo-lora32-v2
Te6edf3custom_variant Tff7b72= Ta5d6fflora32v20_extled
Te6edf3board_build.partitions Tff7b72= Ta5d6ffno_ota.csv
Te6edf3board_build.filesystem Tff7b72= Ta5d6fflittlefs
Te6edf3build_unflags Tff7b72=
Te6edf3${envTff7b72:Ta5d6ffembedded-esp32-minimal.build_unflags}
Te6edf3build_flags Tff7b72=
Te6edf3${envTff7b72:Ta5d6ffembedded-esp32-minimal.build_flags}
Te6edf3-DBOARD_MODELTff7b72=Ta5d6ffBOARD_LORA32_V1_0
Te6edf3-DEXTERNAL_LEDSTff7b72=Ta5d6fftrue
Te6edf3-DUSTORE_USE_POSIXFSTff7b72=Ta5d6ff1
Te6edf3-DURTN_PATH_TABLE_MAX_RECSTff7b72=Ta5d6ff500
Te6edf3-DRNS_PATH_TABLE_SEGMENT_SIZETff7b72=Ta5d6ff24576 T8b949e; 24 KB
Te6edf3-DRNS_PATH_TABLE_SEGMENT_COUNTTff7b72=Ta5d6ff8
Te6edf3lib_deps Tff7b72=
Te6edf3${envTff7b72:Ta5d6ffembedded-esp32.lib_deps}
Te6edf3XPowersLib@^0.2.1
Te6edf3httpsTff7b72:Ta5d6ff//github.com/attermann/microStore.git
Te6edf3httpsTff7b72:Ta5d6ff//github.com/attermann/microReticulum.git

T8b949e; MCU: ESP32 (usually ESP32-D0WDQ6)
T8b949e; SRAM: 520 KB internal SRAM
T8b949e; Flash: 4 MB (sometimes 8 MB on newer batches)
T8b949e; PSRAM: N/A
T8b949e; External Flash Interface: N/A
T8b949e; LoRa: Semtech SX1276/SX1278
Tff7b72[env:ttgo-lora32-v21]
Te6edf3extends Tff7b72= Ta5d6ffenv:embedded-esp32-minimal
Te6edf3platform Tff7b72= Ta5d6ffespressif32
Te6edf3board Tff7b72= Ta5d6ffttgo-lora32-v21
Te6edf3custom_variant Tff7b72= Ta5d6fflora32v21
Te6edf3board_build.partitions Tff7b72= Ta5d6ffno_ota.csv
Te6edf3board_build.filesystem Tff7b72= Ta5d6fflittlefs
Te6edf3build_unflags Tff7b72=
Te6edf3${envTff7b72:Ta5d6ffembedded-esp32-minimal.build_unflags}
Te6edf3build_flags Tff7b72=
Te6edf3${envTff7b72:Ta5d6ffembedded-esp32-minimal.build_flags}
Te6edf3-DBOARD_MODELTff7b72=Ta5d6ffBOARD_LORA32_V2_1
T8b949e;-DHAS_SDCARD=1
Te6edf3-DSDCARD_SCLKTff7b72=Ta5d6ff14
Te6edf3-DSDCARD_MISOTff7b72=Ta5d6ff2
Te6edf3-DSDCARD_MOSITff7b72=Ta5d6ff15
Te6edf3-DSDCARD_CSTff7b72=Ta5d6ff13
Te6edf3-DUSTORE_USE_POSIXFSTff7b72=Ta5d6ff1
Te6edf3-DURTN_PATH_TABLE_MAX_RECSTff7b72=Ta5d6ff500
Te6edf3-DRNS_PATH_TABLE_SEGMENT_SIZETff7b72=Ta5d6ff24576 T8b949e; 24 KB
Te6edf3-DRNS_PATH_TABLE_SEGMENT_COUNTTff7b72=Ta5d6ff8
Te6edf3lib_deps Tff7b72=
Te6edf3${envTff7b72:Ta5d6ffembedded-esp32.lib_deps}
Te6edf3XPowersLib@^0.2.1
Te6edf3httpsTff7b72:Ta5d6ff//github.com/attermann/microStore.git
Te6edf3httpsTff7b72:Ta5d6ff//github.com/attermann/microReticulum.git

T8b949e; MCU: ESP32 (usually ESP32-D0WDQ6)
T8b949e; SRAM: 520 KB internal SRAM
T8b949e; Flash: 4 MB (sometimes 8 MB on newer batches)
T8b949e; PSRAM: N/A
T8b949e; External Flash Interface: N/A
T8b949e; LoRa: Semtech SX1276/SX1278
Tff7b72[env:ttgo-lora32-v21-extled]
Te6edf3extends Tff7b72= Ta5d6ffenv:embedded-esp32-minimal
Te6edf3platform Tff7b72= Ta5d6ffespressif32
Te6edf3board Tff7b72= Ta5d6ffttgo-lora32-v21
Te6edf3custom_variant Tff7b72= Ta5d6fflora32v21_extled
Te6edf3board_build.partitions Tff7b72= Ta5d6ffno_ota.csv
Te6edf3board_build.filesystem Tff7b72= Ta5d6fflittlefs
Te6edf3build_unflags Tff7b72=
Te6edf3${envTff7b72:Ta5d6ffembedded-esp32-minimal.build_unflags}
Te6edf3build_flags Tff7b72=
Te6edf3${envTff7b72:Ta5d6ffembedded-esp32-minimal.build_flags}
Te6edf3-DBOARD_MODELTff7b72=Ta5d6ffBOARD_LORA32_V2_1
Te6edf3-DEXTERNAL_LEDSTff7b72=Ta5d6fftrue
Te6edf3-DUSTORE_USE_POSIXFSTff7b72=Ta5d6ff1
Te6edf3-DURTN_PATH_TABLE_MAX_RECSTff7b72=Ta5d6ff500
Te6edf3-DRNS_PATH_TABLE_SEGMENT_SIZETff7b72=Ta5d6ff24576 T8b949e; 24 KB
Te6edf3-DRNS_PATH_TABLE_SEGMENT_COUNTTff7b72=Ta5d6ff8
Te6edf3lib_deps Tff7b72=
Te6edf3${envTff7b72:Ta5d6ffembedded-esp32.lib_deps}
Te6edf3XPowersLib@^0.2.1
Te6edf3httpsTff7b72:Ta5d6ff//github.com/attermann/microStore.git
Te6edf3httpsTff7b72:Ta5d6ff//github.com/attermann/microReticulum.git

T8b949e; MCU: ESP32 (usually ESP32-D0WDQ6)
T8b949e; SRAM: 520 KB internal SRAM
T8b949e; Flash: 4 MB (sometimes 8 MB on newer batches)
T8b949e; PSRAM: N/A
T8b949e; External Flash Interface: N/A
T8b949e; LoRa: Semtech SX1276/SX1278
Tff7b72[env:ttgo-lora32-v21-tcxo]
Te6edf3extends Tff7b72= Ta5d6ffenv:embedded-esp32-minimal
Te6edf3platform Tff7b72= Ta5d6ffespressif32
Te6edf3board Tff7b72= Ta5d6ffttgo-lora32-v21
Te6edf3custom_variant Tff7b72= Ta5d6fflora32v21_extled
Te6edf3board_build.partitions Tff7b72= Ta5d6ffno_ota.csv
Te6edf3board_build.filesystem Tff7b72= Ta5d6fflittlefs
Te6edf3build_unflags Tff7b72=
Te6edf3${envTff7b72:Ta5d6ffembedded-esp32-minimal.build_unflags}
Te6edf3build_flags Tff7b72=
Te6edf3${envTff7b72:Ta5d6ffembedded-esp32-minimal.build_flags}
Te6edf3-DBOARD_MODELTff7b72=Ta5d6ffBOARD_LORA32_V2_1
Te6edf3-DENABLE_TCXOTff7b72=Ta5d6fftrue
Te6edf3-DUSTORE_USE_POSIXFSTff7b72=Ta5d6ff1
Te6edf3-DURTN_PATH_TABLE_MAX_RECSTff7b72=Ta5d6ff500
Te6edf3-DRNS_PATH_TABLE_SEGMENT_SIZETff7b72=Ta5d6ff24576 T8b949e; 24 KB
Te6edf3-DRNS_PATH_TABLE_SEGMENT_COUNTTff7b72=Ta5d6ff8
Te6edf3lib_deps Tff7b72=
Te6edf3${envTff7b72:Ta5d6ffembedded-esp32.lib_deps}
Te6edf3XPowersLib@^0.2.1
Te6edf3httpsTff7b72:Ta5d6ff//github.com/attermann/microStore.git
Te6edf3httpsTff7b72:Ta5d6ff//github.com/attermann/microReticulum.git

T8b949e; MCU: ESP32
T8b949e; SRAM: 520 KB
T8b949e; PSRAM: N/A
T8b949e; Flash: 8 MB
T8b949e; External Flash Interface: N/A
T8b949e; LoRa: Semtech SX1276/SX1278
Tff7b72[env:heltec_wifi_lora_32_V2]
Te6edf3extends Tff7b72= Ta5d6ffenv:embedded
Te6edf3platform Tff7b72= Ta5d6ffespressif32
Te6edf3board Tff7b72= Ta5d6ffheltec_wifi_lora_32_V2
Te6edf3custom_variant Tff7b72= Ta5d6ffheltec32v2
T8b949e;board_build.partitions = no_ota.csv
Te6edf3board_upload.flash_size Tff7b72= Ta5d6ff8MB
Te6edf3board_upload.maximum_size Tff7b72= Ta5d6ff8388608
Te6edf3board_build.partitions Tff7b72= Ta5d6ffdefault_8MB.csv
Te6edf3board_build.filesystem Tff7b72= Ta5d6fflittlefs
Te6edf3build_flags Tff7b72=
Te6edf3${envTff7b72:Ta5d6ffembedded.build_flags}
Te6edf3-DBOARD_MODELTff7b72=Ta5d6ffBOARD_LORA32_V2_1
Te6edf3-DUSTORE_USE_POSIXFSTff7b72=Ta5d6ff1
Te6edf3-DURTN_PATH_TABLE_MAX_RECSTff7b72=Ta5d6ff500
Te6edf3-DRNS_PATH_TABLE_SEGMENT_SIZETff7b72=Ta5d6ff24576 T8b949e; 24 KB
Te6edf3-DRNS_PATH_TABLE_SEGMENT_COUNTTff7b72=Ta5d6ff8
Te6edf3lib_deps Tff7b72=
Te6edf3${envTff7b72:Ta5d6ffembedded-esp32.lib_deps}
Te6edf3XPowersLib@^0.2.1
Te6edf3httpsTff7b72:Ta5d6ff//github.com/attermann/microStore.git
Te6edf3httpsTff7b72:Ta5d6ff//github.com/attermann/microReticulum.git

T8b949e; MCU: ESP32
T8b949e; SRAM: 520 KB
T8b949e; PSRAM: N/A
T8b949e; Flash: 8 MB
T8b949e; External Flash Interface: N/A
T8b949e; LoRa: Semtech SX1276/SX1278
Tff7b72[env:heltec_wifi_lora_32_V2-extled]
Te6edf3extends Tff7b72= Ta5d6ffenv:embedded
Te6edf3platform Tff7b72= Ta5d6ffespressif32
Te6edf3board Tff7b72= Ta5d6ffheltec_wifi_lora_32_V2
Te6edf3custom_variant Tff7b72= Ta5d6ffheltec32v2_extled
T8b949e;board_build.partitions = no_ota.csv
Te6edf3board_upload.flash_size Tff7b72= Ta5d6ff8MB
Te6edf3board_upload.maximum_size Tff7b72= Ta5d6ff8388608
Te6edf3board_build.partitions Tff7b72= Ta5d6ffdefault_8MB.csv
Te6edf3board_build.filesystem Tff7b72= Ta5d6fflittlefs
Te6edf3build_flags Tff7b72=
Te6edf3${envTff7b72:Ta5d6ffembedded.build_flags}
Te6edf3-DBOARD_MODELTff7b72=Ta5d6ffBOARD_LORA32_V2_1
Te6edf3-DEXTERNAL_LEDSTff7b72=Ta5d6fftrue
Te6edf3-DUSTORE_USE_POSIXFSTff7b72=Ta5d6ff1
Te6edf3-DURTN_PATH_TABLE_MAX_RECSTff7b72=Ta5d6ff500
Te6edf3-DRNS_PATH_TABLE_SEGMENT_SIZETff7b72=Ta5d6ff24576 T8b949e; 24 KB
Te6edf3-DRNS_PATH_TABLE_SEGMENT_COUNTTff7b72=Ta5d6ff8
Te6edf3lib_deps Tff7b72=
Te6edf3${envTff7b72:Ta5d6ffembedded-esp32.lib_deps}
Te6edf3XPowersLib@^0.2.1
Te6edf3httpsTff7b72:Ta5d6ff//github.com/attermann/microStore.git
Te6edf3httpsTff7b72:Ta5d6ff//github.com/attermann/microReticulum.git

T8b949e; MCU: ESP32-S3 (ESP32-S3FN8)
T8b949e; SRAM: 512 KB
T8b949e; PSRAM: N/A
T8b949e; Flash: 8 MB
T8b949e; External Flash Interface: N/A
T8b949e; LoRa: Semtech SX1262
Tff7b72[env:heltec_wifi_lora_32_V3]
Te6edf3extends Tff7b72= Ta5d6ffenv:embedded
Te6edf3platform Tff7b72= Ta5d6ffespressif32
Te6edf3board Tff7b72= Ta5d6ffheltec_wifi_lora_32_V3
Te6edf3custom_variant Tff7b72= Ta5d6ffheltec32v3
T8b949e;board_build.partitions = no_ota.csv
Te6edf3board_upload.flash_size Tff7b72= Ta5d6ff8MB
Te6edf3board_upload.maximum_size Tff7b72= Ta5d6ff8388608
Te6edf3board_build.partitions Tff7b72= Ta5d6ffdefault_8MB.csv
Te6edf3board_build.filesystem Tff7b72= Ta5d6fflittlefs
Te6edf3build_flags Tff7b72=
Te6edf3${envTff7b72:Ta5d6ffembedded.build_flags}
Te6edf3-DBOARD_MODELTff7b72=Ta5d6ffBOARD_HELTEC32_V3
Te6edf3-DUSTORE_USE_POSIXFSTff7b72=Ta5d6ff1
Te6edf3-DURTN_PATH_TABLE_MAX_RECSTff7b72=Ta5d6ff500
Te6edf3-DRNS_PATH_TABLE_SEGMENT_SIZETff7b72=Ta5d6ff24576 T8b949e; 24 KB
Te6edf3-DRNS_PATH_TABLE_SEGMENT_COUNTTff7b72=Ta5d6ff8
Te6edf3lib_deps Tff7b72=
Te6edf3${envTff7b72:Ta5d6ffembedded-esp32.lib_deps}
Te6edf3XPowersLib@^0.2.1
Te6edf3httpsTff7b72:Ta5d6ff//github.com/attermann/microStore.git
Te6edf3httpsTff7b72:Ta5d6ff//github.com/attermann/microReticulum.git

T8b949e; ESP32-S3 (ESP32-S3R2 Xtensa 32-bit LX7 dual-core, 240MHz)
T8b949e; SRAM: 512 KB
T8b949e; PSRAM: 2 MB
T8b949e; Flash: 16 MB
T8b949e; External Flash Interface: N/A
T8b949e; LoRa: Semtech SX1262
T8b949e; LoRa: Semtech SX1262
T8b949e; also Heltec Wireless Tracker
Tff7b72[env:heltec_wifi_lora_32_V4]
Te6edf3extends Tff7b72= Ta5d6ffenv:embedded
Te6edf3platform Tff7b72= Ta5d6ffespressif32
Te6edf3board Tff7b72= Ta5d6ffesp32-s3-devkitc-1
Te6edf3custom_variant Tff7b72= Ta5d6ffheltec32v4pa
T8b949e;board_build.partitions = no_ota.csv
Te6edf3board_upload.flash_size Tff7b72= Ta5d6ff16MB
Te6edf3board_upload.maximum_size Tff7b72= Ta5d6ff16777216
Te6edf3board_build.partitions Tff7b72= Ta5d6ffdefault_16MB.csv
Te6edf3board_build.filesystem Tff7b72= Ta5d6fflittlefs
Te6edf3board_build.psram Tff7b72= Ta5d6ffenabled
Te6edf3build_flags Tff7b72=
Te6edf3${envTff7b72:Ta5d6ffembedded.build_flags}
Te6edf3-DBOARD_MODELTff7b72=Ta5d6ffBOARD_HELTEC32_V4
Te6edf3-DARDUINO_USB_CDC_ON_BOOTTff7b72=Ta5d6ff1
Te6edf3-DBOARD_HAS_PSRAMTff7b72=Ta5d6ff1
Te6edf3-DUDP_TRANSPORT
Te6edf3-DRNS_CONTAINER_ALLOCATORTff7b72=Ta5d6ffRNS_PSRAM_ALLOCATOR
Te6edf3-DUSTORE_USE_POSIXFSTff7b72=Ta5d6ff1
Te6edf3-DURTN_PATH_TABLE_MAX_RECSTff7b72=Ta5d6ff2000
Te6edf3-DRNS_PATH_TABLE_SEGMENT_SIZETff7b72=Ta5d6ff98304 T8b949e; 96 KB
Te6edf3-DRNS_PATH_TABLE_SEGMENT_COUNTTff7b72=Ta5d6ff8
Te6edf3lib_deps Tff7b72=
Te6edf3${envTff7b72:Ta5d6ffembedded-esp32.lib_deps}
Te6edf3XPowersLib@^0.2.1
Te6edf3httpsTff7b72:Ta5d6ff//github.com/attermann/microStore.git
Te6edf3httpsTff7b72:Ta5d6ff//github.com/attermann/microReticulum.git

T8b949e; MCU: ESP32-S3 (ESP32-S3FN8)
T8b949e; SRAM: 512 KB
T8b949e; PSRAM: N/A
T8b949e; Flash: 8 MB
T8b949e; External Flash Interface: N/A
T8b949e; Display: 0.96-inch 80x160 ST7735-compatible TFT
T8b949e; LoRa: Semtech SX1262 with KCT8103L FEM, up to 28 dBm
Tff7b72[env:heltec-wireless-tracker-v2]
Te6edf3extends Tff7b72= Ta5d6ffenv:embedded
T8b949e; Pin the official PlatformIO distribution because the firmware BLE transport
T8b949e; uses Arduino-ESP32's Bluedroid API. The Tasmota 2.0.14 package selected by
T8b949e; some global PlatformIO installations is built for NimBLE instead.
Te6edf3platform Tff7b72= Ta5d6ffespressif32
T8b949e;platform = platformio/espressif32 @ 7.0.0
Te6edf3board Tff7b72= Ta5d6ffheltec-wireless-tracker-v2
Te6edf3custom_variant Tff7b72= Ta5d6ffheltec_tracker_v2
Te6edf3board_upload.flash_size Tff7b72= Ta5d6ff8MB
Te6edf3board_upload.maximum_size Tff7b72= Ta5d6ff8388608
Te6edf3board_build.partitions Tff7b72= Ta5d6ffdefault_8MB.csv
Te6edf3board_build.filesystem Tff7b72= Ta5d6fflittlefs
Te6edf3lib_ignore Tff7b72=
Te6edf3SD
Te6edf3Adafruit seesaw Library
Te6edf3build_flags Tff7b72=
Te6edf3${envTff7b72:Ta5d6ffembedded.build_flags}
Te6edf3-DBOARD_MODELTff7b72=Ta5d6ffBOARD_HELTEC_TRACKER_V2
Te6edf3-DUSTORE_USE_POSIXFSTff7b72=Ta5d6ff1
Te6edf3-DURTN_PATH_TABLE_MAX_RECSTff7b72=Ta5d6ff500
Te6edf3-DRNS_PATH_TABLE_SEGMENT_SIZETff7b72=Ta5d6ff24576 T8b949e; 24 KB
Te6edf3-DRNS_PATH_TABLE_SEGMENT_COUNTTff7b72=Ta5d6ff8
Te6edf3lib_deps Tff7b72=
Te6edf3${envTff7b72:Ta5d6ffembedded-esp32.lib_deps}
Te6edf3adafruit/Adafruit ST7735 and ST7789 Library@^1.10.4
Te6edf3httpsTff7b72:Ta5d6ff//github.com/attermann/microStore.git
Te6edf3httpsTff7b72:Ta5d6ff//github.com/attermann/microReticulum.git
Te6edf3monitor_filters Tff7b72= Ta5d6ffesp32_exception_decoder
Te6edf3upload_speed Tff7b72= Ta5d6ff921600

Tff7b72[env:heltec-wireless-tracker-v2-local]
Te6edf3extends Tff7b72= Ta5d6ffenv:heltec-wireless-tracker-v2
Te6edf3custom_variant Tff7b72= Ta5d6ffheltec_tracker_v2_local
Te6edf3lib_deps Tff7b72=
Te6edf3${envTff7b72:Ta5d6ffembedded-esp32.lib_deps}
Te6edf3adafruit/Adafruit ST7735 and ST7789 Library@^1.10.4
Te6edf3httpsTff7b72:Ta5d6ff//github.com/attermann/microStore.git
Te6edf3microReticulumTff7b72=Ta5d6ffsymlink://../microReticulum

T8b949e; MCU: ESP32
T8b949e; SRAM: 520 KB
T8b949e; PSRAM: N/A
T8b949e; Flash: 4 MB
T8b949e; External Flash Interface: N/A
Tff7b72[env:featheresp32]
Te6edf3extends Tff7b72= Ta5d6ffenv:embedded
Te6edf3platform Tff7b72= Ta5d6ffespressif32
Te6edf3board Tff7b72= Ta5d6fffeatheresp32
Te6edf3custom_variant Tff7b72= Ta5d6fffeatheresp32
Te6edf3board_build.partitions Tff7b72= Ta5d6ffno_ota.csv
Te6edf3board_build.filesystem Tff7b72= Ta5d6fflittlefs
Te6edf3build_flags Tff7b72=
Te6edf3${envTff7b72:Ta5d6ffembedded.build_flags}
Te6edf3-DBOARD_MODELTff7b72=Ta5d6ffBOARD_HUZZAH32
Te6edf3-DUSTORE_USE_POSIXFSTff7b72=Ta5d6ff1
Te6edf3-DURTN_PATH_TABLE_MAX_RECSTff7b72=Ta5d6ff500
Te6edf3-DRNS_PATH_TABLE_SEGMENT_SIZETff7b72=Ta5d6ff24576 T8b949e; 24 KB
Te6edf3-DRNS_PATH_TABLE_SEGMENT_COUNTTff7b72=Ta5d6ff8
Te6edf3lib_deps Tff7b72=
Te6edf3${envTff7b72:Ta5d6ffembedded-esp32.lib_deps}
Te6edf3XPowersLib@^0.2.1
Te6edf3httpsTff7b72:Ta5d6ff//github.com/attermann/microStore.git
Te6edf3httpsTff7b72:Ta5d6ff//github.com/attermann/microReticulum.git

T8b949e; MCU: ESP32-S3
T8b949e; SRAM: 512 KB
T8b949e; PSRAM: N/A
T8b949e; Flash: 8 MB
T8b949e; External Flash Interface: N/A
T8b949e; LoRa: Semtech SX1262
Tff7b72[env:seeed_xiao_esp32s3]
Te6edf3extends Tff7b72= Ta5d6ffenv:embedded
Te6edf3platform Tff7b72= Ta5d6ffespressif32
Te6edf3board Tff7b72= Ta5d6ffseeed_xiao_esp32s3
Te6edf3custom_variant Tff7b72= Ta5d6ffxiao_esp32s3
T8b949e;board_build.partitions = no_ota.csv
Te6edf3board_upload.flash_size Tff7b72= Ta5d6ff8MB
Te6edf3board_upload.maximum_size Tff7b72= Ta5d6ff8388608
Te6edf3board_build.partitions Tff7b72= Ta5d6ffdefault_8MB.csv
Te6edf3board_build.filesystem Tff7b72= Ta5d6fflittlefs
Te6edf3build_flags Tff7b72=
Te6edf3${envTff7b72:Ta5d6ffembedded.build_flags}
Te6edf3-DBOARD_MODELTff7b72=Ta5d6ffBOARD_XIAO_S3
Te6edf3-DUSTORE_USE_POSIXFSTff7b72=Ta5d6ff1
Te6edf3-DURTN_PATH_TABLE_MAX_RECSTff7b72=Ta5d6ff500
Te6edf3-DRNS_PATH_TABLE_SEGMENT_SIZETff7b72=Ta5d6ff24576 T8b949e; 24 KB
Te6edf3-DRNS_PATH_TABLE_SEGMENT_COUNTTff7b72=Ta5d6ff8
Te6edf3lib_deps Tff7b72=
Te6edf3${envTff7b72:Ta5d6ffembedded-esp32.lib_deps}
Te6edf3XPowersLib@^0.2.1
Te6edf3httpsTff7b72:Ta5d6ff//github.com/attermann/microStore.git
Te6edf3httpsTff7b72:Ta5d6ff//github.com/attermann/microReticulum.git

T8b949e; MCU: ESP32 (varies)
T8b949e; SRAM: 520 KB
T8b949e; PSRAM: Varies
T8b949e; Flash: 4–16 MB depending on module
T8b949e; External Flash Interface: N/A
T8b949e; LoRa: Varies
Tff7b72[env:generic-esp32]
Te6edf3extends Tff7b72= Ta5d6ffenv:embedded
Te6edf3platform Tff7b72= Ta5d6ffespressif32
Te6edf3board Tff7b72= Ta5d6ffesp32dev
Te6edf3custom_variant Tff7b72= Ta5d6ffesp32_generic
Te6edf3board_build.partitions Tff7b72= Ta5d6ffno_ota.csv
Te6edf3board_build.filesystem Tff7b72= Ta5d6fflittlefs
Te6edf3build_flags Tff7b72=
Te6edf3${envTff7b72:Ta5d6ffembedded.build_flags}
Te6edf3-DBOARD_MODELTff7b72=Ta5d6ffBOARD_GENERIC_ESP32
Te6edf3-DUSTORE_USE_POSIXFSTff7b72=Ta5d6ff1
Te6edf3-DUSTORE_USE_POSIXFSTff7b72=Ta5d6ff1
Te6edf3-DURTN_PATH_TABLE_MAX_RECSTff7b72=Ta5d6ff500
Te6edf3-DRNS_PATH_TABLE_SEGMENT_SIZETff7b72=Ta5d6ff24576 T8b949e; 24 KB
Te6edf3-DRNS_PATH_TABLE_SEGMENT_COUNTTff7b72=Ta5d6ff8
Te6edf3lib_deps Tff7b72=
Te6edf3${envTff7b72:Ta5d6ffembedded-esp32.lib_deps}
Te6edf3XPowersLib@^0.2.1
Te6edf3httpsTff7b72:Ta5d6ff//github.com/attermann/microStore.git
Te6edf3httpsTff7b72:Ta5d6ff//github.com/attermann/microReticulum.git

T8b949e; MCU: Nordic nRF52840 (32-bit ARM Cortex-M4, 64 MHz)
T8b949e; SRAM: 256 KB
T8b949e; PSRAM: N/A
T8b949e; Flash: 1 MB internal
T8b949e; External Flash Interface: YES (via SPI / QSPI on WisBlock baseboards)
T8b949e; LoRa: Semtech SX1262
Tff7b72[env:wiscore_rak4631]
Te6edf3extends Tff7b72= Ta5d6ffenv:embedded-nrf52-minimal
Te6edf3platform Tff7b72= Ta5d6ffnordicnrf52
Te6edf3board Tff7b72= Ta5d6ffrak4630
Te6edf3custom_variant Tff7b72= Ta5d6ffrak4631
Te6edf3board_build.variants_dir Tff7b72= Ta5d6ffvariants
Te6edf3board_build.variant Tff7b72= Ta5d6ffrak4630
T8b949e;board_build.partitions = no_ota.csv ; Does not apply to nordicnrf52 builds
Te6edf3board_build.filesystem Tff7b72= Ta5d6fflittlefs
Te6edf3build_unflags Tff7b72=
Te6edf3${envTff7b72:Ta5d6ffembedded-nrf52-minimal.build_unflags}
Te6edf3build_flags Tff7b72=
Te6edf3${envTff7b72:Ta5d6ffembedded-nrf52-minimal.build_flags}
Te6edf3-DBOARD_MODELTff7b72=Ta5d6ffBOARD_RAK4631
Te6edf3-DHAS_GPIO
Te6edf3-DHAS_BME
Te6edf3-DRNS_CONTAINER_ALLOCATORTff7b72=Ta5d6ffRNS_HEAP_POOL_ALLOCATOR
Te6edf3-DRNS_HEAP_POOL_BUFFER_SIZETff7b72=Ta5d6ff131072
Te6edf3-DUSTORE_USE_INTERNALFS
Te6edf3-DUSTORE_USE_FLASHFS
Te6edf3-DURTN_PATH_TABLE_MAX_RECSTff7b72=Ta5d6ff25
Te6edf3-DRNS_PATH_TABLE_SEGMENT_SIZETff7b72=Ta5d6ff2048 T8b949e; 2 KB
Te6edf3-DRNS_PATH_TABLE_SEGMENT_COUNTTff7b72=Ta5d6ff6
Te6edf3lib_deps Tff7b72=
Te6edf3${envTff7b72:Ta5d6ffembedded-nrf52.lib_deps}
Te6edf3httpsTff7b72:Ta5d6ff//github.com/attermann/microStore.git
Te6edf3httpsTff7b72:Ta5d6ff//github.com/attermann/microReticulum.git
Te6edf3adafruit/SdFat - Adafruit Fork
Te6edf3httpsTff7b72:Ta5d6ff//github.com/attermann/Adafruit_SPIFlashT8b949e#littlefs
Te6edf3adafruit/Adafruit BME680 Library@^2.0.6

T8b949e; MCU: Nordic nRF52840 (32-bit ARM Cortex-M4, 64 MHz)
T8b949e; SRAM: 256 KB
T8b949e; PSRAM: N/A
T8b949e; Flash: 1 MB internal
T8b949e; External Flash Interface: YES (via SPI / QSPI on WisBlock baseboards)
T8b949e; LoRa: Semtech SX1262
Tff7b72[env:wiscore_rak3401]
Te6edf3extends Tff7b72= Ta5d6ffenv:embedded-nrf52-minimal
Te6edf3platform Tff7b72= Ta5d6ffnordicnrf52
Te6edf3board Tff7b72= Ta5d6ffrak3401
Te6edf3custom_variant Tff7b72= Ta5d6ffrak3401
Te6edf3board_build.variants_dir Tff7b72= Ta5d6ffvariants
Te6edf3board_build.variant Tff7b72= Ta5d6ffrak3401
T8b949e;board_build.partitions = no_ota.csv ; Does not apply to nordicnrf52 builds
Te6edf3board_build.filesystem Tff7b72= Ta5d6fflittlefs
Te6edf3build_unflags Tff7b72=
Te6edf3${envTff7b72:Ta5d6ffembedded-nrf52-minimal.build_unflags}
Te6edf3build_flags Tff7b72=
Te6edf3${envTff7b72:Ta5d6ffembedded-nrf52-minimal.build_flags}
Te6edf3-DBOARD_MODELTff7b72=Ta5d6ffBOARD_RAK3401
Te6edf3-DHAS_GPIO
Te6edf3-DHAS_BME
Te6edf3-DRNS_CONTAINER_ALLOCATORTff7b72=Ta5d6ffRNS_HEAP_POOL_ALLOCATOR
Te6edf3-DRNS_HEAP_POOL_BUFFER_SIZETff7b72=Ta5d6ff131072
Te6edf3-DUSTORE_USE_INTERNALFS
Te6edf3-DUSTORE_USE_FLASHFS
Te6edf3-DURTN_PATH_TABLE_MAX_RECSTff7b72=Ta5d6ff25
Te6edf3-DRNS_PATH_TABLE_SEGMENT_SIZETff7b72=Ta5d6ff2048 T8b949e; 2 KB
Te6edf3-DRNS_PATH_TABLE_SEGMENT_COUNTTff7b72=Ta5d6ff6
Te6edf3lib_deps Tff7b72=
Te6edf3${envTff7b72:Ta5d6ffembedded-nrf52.lib_deps}
Te6edf3httpsTff7b72:Ta5d6ff//github.com/attermann/microStore.git
Te6edf3httpsTff7b72:Ta5d6ff//github.com/attermann/microReticulum.git
Te6edf3adafruit/SdFat - Adafruit Fork
Te6edf3httpsTff7b72:Ta5d6ff//github.com/attermann/Adafruit_SPIFlashT8b949e#littlefs
Te6edf3adafruit/Adafruit BME680 Library@^2.0.6

T8b949e; MCU: Nordic nRF52840 (32-bit ARM Cortex-M4, 64 MHz)
T8b949e; SRAM: 256 KB
T8b949e; PSRAM: N/A
T8b949e; Flash: 1 MB internal
T8b949e; External Flash Interface: N/A
T8b949e; LoRa: Semtech SX1262
T8b949e; NOTE: Must double-click RESET button (top-left) to enter DFU mode before uploading firmware
Tff7b72[env:lilygo-t-echo]
Te6edf3extends Tff7b72= Ta5d6ffenv:embedded-nrf52-minimal
Te6edf3platform Tff7b72= Ta5d6ffnordicnrf52
Te6edf3board Tff7b72= Ta5d6ffnrf52840_dk_adafruit
Te6edf3custom_variant Tff7b72= Ta5d6fftecho
T8b949e;board_build.partitions = no_ota.csv ; Does not apply to nordicnrf52 builds
Te6edf3board_build.filesystem Tff7b72= Ta5d6fflittlefs
T8b949e; Required so the linker pulls in Adafruit_TinyUSB_API.cpp's strong definition
T8b949e; of TinyUSB_Device_Init() — declared weak in the BSP header, so without this
T8b949e; the BSP's call to it from loop_task() gets patched to a no-op and USB CDC
T8b949e; never initializes.
Te6edf3lib_archive Tff7b72= Ta5d6ffno
Te6edf3build_unflags Tff7b72=
Te6edf3${envTff7b72:Ta5d6ffembedded-nrf52-minimal.build_unflags}
Te6edf3build_flags Tff7b72=
Te6edf3${envTff7b72:Ta5d6ffembedded-nrf52-minimal.build_flags}
Te6edf3-DBOARD_MODELTff7b72=Ta5d6ffBOARD_TECHO
T8b949e; CBA The heap pool allocator is what was causing the board to fail to boot due to very early static init failure
Te6edf3-DRNS_DEFAULT_ALLOCATORTff7b72=Ta5d6ffRNS_HEAP_POOL_ALLOCATOR
T8b949e;-DRNS_HEAP_POOL_BUFFER_SIZE=131072
Te6edf3-DRNS_HEAP_POOL_BUFFER_SIZETff7b72=Ta5d6ff98304
Te6edf3-DUSTORE_USE_INTERNALFS
Te6edf3-DURTN_PATH_TABLE_MAX_RECSTff7b72=Ta5d6ff25
Te6edf3-DRNS_PATH_TABLE_SEGMENT_SIZETff7b72=Ta5d6ff2048 T8b949e; 2 KB
Te6edf3-DRNS_PATH_TABLE_SEGMENT_COUNTTff7b72=Ta5d6ff6
Te6edf3lib_deps Tff7b72=
Te6edf3${envTff7b72:Ta5d6ffembedded-nrf52.lib_deps}
Te6edf3httpsTff7b72:Ta5d6ff//github.com/liamcottle/esp8266-oled-ssd1306T8b949e#e16cee124fe26490cb14880c679321ad8ac89c95
Te6edf3adafruit/Adafruit NeoPixel@^1.12.0
Te6edf3zinggjm/GxEPD2
Te6edf3httpsTff7b72:Ta5d6ff//github.com/attermann/microStore.git
Te6edf3httpsTff7b72:Ta5d6ff//github.com/attermann/microReticulum.git
Te6edf3upload_protocol Tff7b72= Ta5d6ffnrfutil
Te6edf3upload_port Tff7b72= Ta5d6ff/dev/cu.usbmodem101



T8b949e; Local dev builds

Tff7b72[env:ttgo-t-beam-local]
Te6edf3extends Tff7b72= Ta5d6ffenv:embedded-esp32-minimal
Te6edf3platform Tff7b72= Ta5d6ffespressif32
Te6edf3board Tff7b72= Ta5d6ffttgo-t-beam
Te6edf3custom_variant Tff7b72= Ta5d6fftbeam_local
Te6edf3board_build.partitions Tff7b72= Ta5d6ffno_ota.csv
Te6edf3board_build.filesystem Tff7b72= Ta5d6fflittlefs
Te6edf3build_unflags Tff7b72=
Te6edf3${envTff7b72:Ta5d6ffembedded-esp32-minimal.build_unflags}
Te6edf3build_flags Tff7b72=
Te6edf3${envTff7b72:Ta5d6ffembedded-esp32-minimal.build_flags}
Te6edf3-DBOARD_MODELTff7b72=Ta5d6ffBOARD_TBEAM
Te6edf3-DBOARD_HAS_PSRAMTff7b72=Ta5d6ff1
Te6edf3-DRNS_CONTAINER_ALLOCATORTff7b72=Ta5d6ffRNS_PSRAM_ALLOCATOR
T8b949e; CBA TEST
Te6edf3-DUSTORE_ENABLE_LOG
Te6edf3-DUSTORE_USE_POSIXFSTff7b72=Ta5d6ff1
Te6edf3-DURTN_PATH_TABLE_MAX_RECSTff7b72=Ta5d6ff500
Te6edf3-DRNS_PATH_TABLE_SEGMENT_SIZETff7b72=Ta5d6ff24576 T8b949e; 24 KB
Te6edf3-DRNS_PATH_TABLE_SEGMENT_COUNTTff7b72=Ta5d6ff8
Te6edf3lib_deps Tff7b72=
Te6edf3${envTff7b72:Ta5d6ffembedded-esp32.lib_deps}
Te6edf3XPowersLib@^0.2.1
Te6edf3microStoreTff7b72=Ta5d6ffsymlink://../microStore
Te6edf3microReticulumTff7b72=Ta5d6ffsymlink://../microReticulum
Te6edf3monitor_filters Tff7b72= Ta5d6ffesp32_exception_decoder
Te6edf3upload_speed Tff7b72= Ta5d6ff460800

Tff7b72[env:ttgo-lora32-v21-local]
Te6edf3extends Tff7b72= Ta5d6ffenv:embedded
Te6edf3platform Tff7b72= Ta5d6ffespressif32
Te6edf3board Tff7b72= Ta5d6ffttgo-lora32-v21
Te6edf3custom_variant Tff7b72= Ta5d6fflora32v21_local
Te6edf3board_build.partitions Tff7b72= Ta5d6ffno_ota.csv
Te6edf3board_build.filesystem Tff7b72= Ta5d6fflittlefs
Te6edf3build_flags Tff7b72=
Te6edf3${envTff7b72:Ta5d6ffembedded.build_flags}
Te6edf3-DBOARD_MODELTff7b72=Ta5d6ffBOARD_LORA32_V2_1
T8b949e;-DRNS_MEM_LOG
T8b949e; CBA Define following to enable UDP transport via WiFi
Te6edf3-DUDP_TRANSPORT
Te6edf3-DUSTORE_ENABLE_LOG
Te6edf3-DUSTORE_USE_POSIXFSTff7b72=Ta5d6ff1
Te6edf3-DURTN_PATH_TABLE_MAX_RECSTff7b72=Ta5d6ff500
Te6edf3-DRNS_PATH_TABLE_SEGMENT_SIZETff7b72=Ta5d6ff24576 T8b949e; 24 KB
Te6edf3-DRNS_PATH_TABLE_SEGMENT_COUNTTff7b72=Ta5d6ff8
Te6edf3lib_deps Tff7b72=
Te6edf3${envTff7b72:Ta5d6ffembedded-esp32.lib_deps}
Te6edf3XPowersLib@^0.2.1
Te6edf3microStoreTff7b72=Ta5d6ffsymlink://../microStore
Te6edf3microReticulumTff7b72=Ta5d6ffsymlink://../microReticulum
Te6edf3monitor_filters Tff7b72= Ta5d6ffesp32_exception_decoder
Te6edf3upload_speed Tff7b72= Ta5d6ff460800

Tff7b72[env:ttgo-lora32-v21-sd-local]
Te6edf3extends Tff7b72= Ta5d6ffenv:embedded
Te6edf3platform Tff7b72= Ta5d6ffespressif32
Te6edf3board Tff7b72= Ta5d6ffttgo-lora32-v21
Te6edf3custom_variant Tff7b72= Ta5d6fflora32v21_local
Te6edf3board_build.partitions Tff7b72= Ta5d6ffno_ota.csv
Te6edf3board_build.filesystem Tff7b72= Ta5d6fflittlefs
Te6edf3build_flags Tff7b72=
Te6edf3${envTff7b72:Ta5d6ffembedded.build_flags}
Te6edf3-DBOARD_MODELTff7b72=Ta5d6ffBOARD_LORA32_V2_1
T8b949e;-DRNS_MEM_LOG
T8b949e; CBA Define following to enable UDP transport via WiFi
Te6edf3-DUDP_TRANSPORT
Te6edf3-DUSTORE_ENABLE_LOG
Te6edf3-DUSTORE_USE_SDTff7b72=Ta5d6ff1
Te6edf3-DSDCARD_SCLKTff7b72=Ta5d6ff14
Te6edf3-DSDCARD_MISOTff7b72=Ta5d6ff2
Te6edf3-DSDCARD_MOSITff7b72=Ta5d6ff15
Te6edf3-DSDCARD_CSTff7b72=Ta5d6ff13
T8b949e;-DURTN_PATH_TABLE_MAX_RECS=500
Te6edf3-DURTN_PATH_TABLE_MAX_RECSTff7b72=Ta5d6ff1000
T8b949e;-DRNS_PATH_TABLE_SEGMENT_SIZE=24576 ; 24 KB
Te6edf3-DRNS_PATH_TABLE_SEGMENT_SIZETff7b72=Ta5d6ff49152 T8b949e; 48 KB
Te6edf3-DRNS_PATH_TABLE_SEGMENT_COUNTTff7b72=Ta5d6ff8
Te6edf3lib_deps Tff7b72=
Te6edf3${envTff7b72:Ta5d6ffembedded-esp32.lib_deps}
Te6edf3XPowersLib@^0.2.1
Te6edf3microStoreTff7b72=Ta5d6ffsymlink://../microStore
Te6edf3microReticulumTff7b72=Ta5d6ffsymlink://../microReticulum
Te6edf3monitor_filters Tff7b72= Ta5d6ffesp32_exception_decoder
Te6edf3upload_speed Tff7b72= Ta5d6ff460800

T8b949e; also Heltec Wireless Tracker
Tff7b72[env:heltec_wifi_lora_32_V4-local]
Te6edf3extends Tff7b72= Ta5d6ffenv:embedded
Te6edf3platform Tff7b72= Ta5d6ffespressif32
Te6edf3board Tff7b72= Ta5d6ffesp32-s3-devkitc-1
Te6edf3custom_variant Tff7b72= Ta5d6ffheltec32v4pa_local
T8b949e;board_build.partitions = no_ota.csv
Te6edf3board_upload.flash_size Tff7b72= Ta5d6ff16MB
Te6edf3board_upload.maximum_size Tff7b72= Ta5d6ff16777216
Te6edf3board_build.partitions Tff7b72= Ta5d6ffdefault_16MB.csv
Te6edf3board_build.filesystem Tff7b72= Ta5d6fflittlefs
Te6edf3build_unflags Tff7b72=
Te6edf3${envTff7b72:Ta5d6ffembedded.build_unflags}
Te6edf3build_flags Tff7b72=
Te6edf3${envTff7b72:Ta5d6ffembedded.build_flags}
Te6edf3-DBOARD_MODELTff7b72=Ta5d6ffBOARD_HELTEC32_V4
Te6edf3-DARDUINO_USB_CDC_ON_BOOTTff7b72=Ta5d6ff1
T8b949e;-DRNS_MEM_LOG
T8b949e; CBA Define following to enable UDP transport via WiFi
Te6edf3-DUDP_TRANSPORT
Te6edf3-DUSTORE_ENABLE_LOG
Te6edf3-DUSTORE_USE_POSIXFSTff7b72=Ta5d6ff1
T8b949e;-DUSTORE_USE_LITTLEFS
Te6edf3-DURTN_PATH_TABLE_MAX_RECSTff7b72=Ta5d6ff500
Te6edf3-DRNS_PATH_TABLE_SEGMENT_SIZETff7b72=Ta5d6ff24576 T8b949e; 24 KB
Te6edf3-DRNS_PATH_TABLE_SEGMENT_COUNTTff7b72=Ta5d6ff8
Te6edf3lib_deps Tff7b72=
Te6edf3${envTff7b72:Ta5d6ffembedded-esp32.lib_deps}
Te6edf3XPowersLib@^0.2.1
Te6edf3microStoreTff7b72=Ta5d6ffsymlink://../microStore
Te6edf3microReticulumTff7b72=Ta5d6ffsymlink://../microReticulum
Te6edf3monitor_filters Tff7b72= Ta5d6ffesp32_exception_decoder
Te6edf3upload_speed Tff7b72= Ta5d6ff921600

T8b949e; also Heltec Wireless Tracker
Tff7b72[env:heltec_wifi_lora_32_V4-local-psram]
Te6edf3extends Tff7b72= Ta5d6ffenv:embedded
T8b949e; Currently framework-arduinoespressif32@3.20017.241212 ??
Te6edf3platform Tff7b72= Ta5d6ffespressif32
T8b949e;board = heltec_wifi_lora_32_V3
Te6edf3board Tff7b72= Ta5d6ffesp32-s3-devkitc-1
Te6edf3custom_variant Tff7b72= Ta5d6ffheltec32v4pa_local
T8b949e;board_build.partitions = no_ota.csv
Te6edf3board_upload.flash_size Tff7b72= Ta5d6ff16MB
Te6edf3board_upload.maximum_size Tff7b72= Ta5d6ff16777216
Te6edf3board_build.partitions Tff7b72= Ta5d6ffdefault_16MB.csv
Te6edf3board_build.filesystem Tff7b72= Ta5d6fflittlefs
Te6edf3board_build.psram Tff7b72= Ta5d6ffenabled
Te6edf3build_unflags Tff7b72=
Te6edf3${envTff7b72:Ta5d6ffembedded.build_unflags}
Te6edf3build_flags Tff7b72=
Te6edf3${envTff7b72:Ta5d6ffembedded.build_flags}
Te6edf3-DBOARD_MODELTff7b72=Ta5d6ffBOARD_HELTEC32_V4
Te6edf3-DARDUINO_USB_CDC_ON_BOOTTff7b72=Ta5d6ff1
T8b949e;-UNDEBUG
T8b949e;-DRNS_MEM_LOG
T8b949e; CBA Define following to enable UDP transport via WiFi
Te6edf3-DUDP_TRANSPORT
T8b949e; CBA BOARD_HAS_PSRAM=1 causes malloc to automatically use PSRAM
Te6edf3-DBOARD_HAS_PSRAMTff7b72=Ta5d6ff1
T8b949e;-DRNS_DEFAULT_ALLOCATOR=RNS_HEAP_ALLOCATOR
T8b949e;-DRNS_DEFAULT_ALLOCATOR=RNS_PSRAM_ALLOCATOR
Te6edf3-DRNS_CONTAINER_ALLOCATORTff7b72=Ta5d6ffRNS_PSRAM_ALLOCATOR
T8b949e;-DRNS_CONTAINER_ALLOCATOR=RNS_PSRAM_POOL_ALLOCATOR
T8b949e;-DRNS_PSRAM_POOL_BUFFER_SIZE=2048000
T8b949e;-DRNS_PSRAM_POOL_BUFFER_SIZE=2000000
T8b949e;-DRNS_PSRAM_POOL_BUFFER_SIZE=1000000
Te6edf3-DUSTORE_ENABLE_LOG
Te6edf3-DUSTORE_USE_POSIXFSTff7b72=Ta5d6ff1
Te6edf3-DURTN_PATH_TABLE_MAX_RECSTff7b72=Ta5d6ff2000
Te6edf3-DRNS_PATH_TABLE_SEGMENT_SIZETff7b72=Ta5d6ff98304 T8b949e; 96 KB
Te6edf3-DRNS_PATH_TABLE_SEGMENT_COUNTTff7b72=Ta5d6ff8
Te6edf3lib_deps Tff7b72=
Te6edf3${envTff7b72:Ta5d6ffembedded-esp32.lib_deps}
Te6edf3XPowersLib@^0.2.1
Te6edf3microStoreTff7b72=Ta5d6ffsymlink://../microStore
Te6edf3microReticulumTff7b72=Ta5d6ffsymlink://../microReticulum
Te6edf3monitor_filters Tff7b72= Ta5d6ffesp32_exception_decoder
Te6edf3upload_speed Tff7b72= Ta5d6ff921600

T8b949e; also Heltec Wireless Tracker
Tff7b72[env:heltec_wifi_lora_32_V4-local-psram-pioarduino]
Te6edf3extends Tff7b72= Ta5d6ffenv:embedded
Te6edf3platform Tff7b72= Ta5d6ffespressif32
T8b949e; Use the pioarduino fork for Arduino Core 3.x / ESP-IDF 5.x support
T8b949e;platform = https://github.com/pioarduino/platform-espressif32/releases/download/51.03.07/platform-espressif32.zip
T8b949e;platform = https://github.com/pioarduino/platform-espressif32/releases/download/53.03.13/platform-espressif32.zip
T8b949e; Very stable
T8b949e;platform = https://github.com/pioarduino/platform-espressif32/releases/download/54.03.21-2/platform-espressif32.zip
T8b949e; Latest stable
T8b949e;platform = https://github.com/pioarduino/platform-espressif32/releases/download/55.03.32/platform-espressif32.zip
Te6edf3board Tff7b72= Ta5d6ffesp32-s3-devkitc-1
T8b949e;board = heltec_wifi_lora_32_V4
T8b949e;board_build.variants_dir = variants
T8b949e;board_build.variant = heltec_V4
Te6edf3custom_variant Tff7b72= Ta5d6ffheltec32v4pa_local
T8b949e;board_build.partitions = no_ota.csv
Te6edf3board_upload.flash_size Tff7b72= Ta5d6ff16MB
Te6edf3board_upload.maximum_size Tff7b72= Ta5d6ff16777216
Te6edf3board_build.partitions Tff7b72= Ta5d6ffdefault_16MB.csv
Te6edf3board_build.filesystem Tff7b72= Ta5d6fflittlefs
Te6edf3board_build.psram Tff7b72= Ta5d6ffenabled
Te6edf3build_unflags Tff7b72=
Te6edf3${envTff7b72:Ta5d6ffembedded.build_unflags}
Te6edf3build_flags Tff7b72=
Te6edf3${envTff7b72:Ta5d6ffembedded.build_flags}
Te6edf3-DBOARD_MODELTff7b72=Ta5d6ffBOARD_HELTEC32_V4
Te6edf3-DARDUINO_USB_CDC_ON_BOOTTff7b72=Ta5d6ff1
T8b949e;-DRNS_MEM_LOG
T8b949e; CBA Define following to enable UDP transport via WiFi
Te6edf3-DUDP_TRANSPORT
T8b949e; CBA BOARD_HAS_PSRAM=1 causes malloc to automatically use PSRAM
Te6edf3-DBOARD_HAS_PSRAMTff7b72=Ta5d6ff1
T8b949e;-DRNS_DEFAULT_ALLOCATOR=RNS_HEAP_ALLOCATOR
T8b949e;-DRNS_DEFAULT_ALLOCATOR=RNS_PSRAM_ALLOCATOR
Te6edf3-DRNS_CONTAINER_ALLOCATORTff7b72=Ta5d6ffRNS_PSRAM_ALLOCATOR
T8b949e;-DRNS_CONTAINER_ALLOCATOR=RNS_PSRAM_POOL_ALLOCATOR
T8b949e;-DRNS_PSRAM_POOL_BUFFER_SIZE=2048000
T8b949e;-DRNS_PSRAM_POOL_BUFFER_SIZE=2000000
T8b949e;-DRNS_PSRAM_POOL_BUFFER_SIZE=1000000
Te6edf3-DUSTORE_ENABLE_LOG
Te6edf3-DUSTORE_USE_POSIXFSTff7b72=Ta5d6ff1
Te6edf3-DURTN_PATH_TABLE_MAX_RECSTff7b72=Ta5d6ff2000
Te6edf3-DRNS_PATH_TABLE_SEGMENT_SIZETff7b72=Ta5d6ff98304 T8b949e; 96 KB
Te6edf3-DRNS_PATH_TABLE_SEGMENT_COUNTTff7b72=Ta5d6ff8
Te6edf3lib_deps Tff7b72=
Te6edf3${envTff7b72:Ta5d6ffembedded-esp32.lib_deps}
Te6edf3XPowersLib@^0.2.1
Te6edf3microStoreTff7b72=Ta5d6ffsymlink://../microStore
Te6edf3microReticulumTff7b72=Ta5d6ffsymlink://../microReticulum
Te6edf3monitor_filters Tff7b72= Ta5d6ffesp32_exception_decoder
Te6edf3upload_speed Tff7b72= Ta5d6ff921600

T8b949e; MCU: Nordic nRF52840 (32-bit ARM Cortex-M4, 64 MHz)
T8b949e; SRAM: 256 KB
T8b949e; PSRAM: N/A
T8b949e; Flash: 1 MB internal
T8b949e; External Flash Interface: YES (via SPI / QSPI on WisBlock baseboards)
T8b949e; LoRa: Semtech SX1262
Tff7b72[env:wiscore_rak4631-local]
Te6edf3extends Tff7b72= Ta5d6ffenv:embedded-nrf52-minimal
Te6edf3platform Tff7b72= Ta5d6ffnordicnrf52
Te6edf3board Tff7b72= Ta5d6ffrak4630
Te6edf3custom_variant Tff7b72= Ta5d6ffrak4631_local
Te6edf3board_build.variants_dir Tff7b72= Ta5d6ffvariants
Te6edf3board_build.variant Tff7b72= Ta5d6ffrak4630
Te6edf3board_build.partitions Tff7b72= Ta5d6ffno_ota.csv
Te6edf3board_build.filesystem Tff7b72= Ta5d6fflittlefs
Te6edf3build_unflags Tff7b72=
Te6edf3${envTff7b72:Ta5d6ffembedded-nrf52-minimal.build_unflags}
Te6edf3build_flags Tff7b72=
Te6edf3${envTff7b72:Ta5d6ffembedded-nrf52-minimal.build_flags}
T8b949e;-Wl,-Map,output.map
Te6edf3-DBOARD_MODELTff7b72=Ta5d6ffBOARD_RAK4631
Te6edf3-DHAS_GPIO
Te6edf3-DHAS_BME
T8b949e; CBA TEST
T8b949e;-UNDEBUG
T8b949e;-DRNS_DEFAULT_ALLOCATOR=RNS_HEAP_ALLOCATOR
Te6edf3-DRNS_DEFAULT_ALLOCATORTff7b72=Ta5d6ffRNS_HEAP_POOL_ALLOCATOR
T8b949e;-DRNS_CONTAINER_ALLOCATOR=RNS_HEAP_ALLOCATOR
Te6edf3-DRNS_CONTAINER_ALLOCATORTff7b72=Ta5d6ffRNS_HEAP_POOL_ALLOCATOR
Te6edf3-DRNS_HEAP_POOL_BUFFER_SIZETff7b72=Ta5d6ff131072
T8b949e;-DRNS_HEAP_POOL_BUFFER_SIZE=65536
T8b949e;-UHAS_RNS
Te6edf3-DUSTORE_ENABLE_LOG
Te6edf3-DUSTORE_USE_INTERNALFS
Te6edf3-DUSTORE_USE_FLASHFS
Te6edf3-DURTN_PATH_TABLE_MAX_RECSTff7b72=Ta5d6ff25
Te6edf3-DRNS_PATH_TABLE_SEGMENT_SIZETff7b72=Ta5d6ff2048 T8b949e; 2 KB
Te6edf3-DRNS_PATH_TABLE_SEGMENT_COUNTTff7b72=Ta5d6ff6
Te6edf3lib_deps Tff7b72=
Te6edf3${envTff7b72:Ta5d6ffembedded-nrf52.lib_deps}
Te6edf3microStoreTff7b72=Ta5d6ffsymlink://../microStore
Te6edf3microReticulumTff7b72=Ta5d6ffsymlink://../microReticulum
Te6edf3adafruit/SdFat - Adafruit Fork
T8b949e;https://github.com/attermann/Adafruit_SPIFlash#littlefs
Te6edf3Adafruit_SPIFlashTff7b72=Ta5d6ffsymlink://../Adafruit_SPIFlash
Te6edf3adafruit/Adafruit BME680 Library@^2.0.6
Te6edf3upload_protocol Tff7b72= Ta5d6ffnrfutil

T8b949e; MCU: Nordic nRF52840 (32-bit ARM Cortex-M4, 64 MHz)
T8b949e; SRAM: 256 KB
T8b949e; PSRAM: N/A
T8b949e; Flash: 1 MB internal
T8b949e; External Flash Interface: YES (via SPI / QSPI on WisBlock baseboards)
T8b949e; LoRa: Semtech SX1262
Tff7b72[env:wiscore_rak3401-local]
Te6edf3extends Tff7b72= Ta5d6ffenv:embedded-nrf52-minimal
Te6edf3platform Tff7b72= Ta5d6ffnordicnrf52
T8b949e;board = rak4630
Te6edf3board Tff7b72= Ta5d6ffrak3401
Te6edf3custom_variant Tff7b72= Ta5d6ffrak3401_local
Te6edf3board_build.variants_dir Tff7b72= Ta5d6ffvariants
T8b949e;board_build.variant = rak4630
Te6edf3board_build.variant Tff7b72= Ta5d6ffrak3401
T8b949e;board_build.partitions = no_ota.csv ; Does not apply to nordicnrf52 builds
Te6edf3board_build.filesystem Tff7b72= Ta5d6fflittlefs
Te6edf3build_unflags Tff7b72=
Te6edf3${envTff7b72:Ta5d6ffembedded-nrf52-minimal.build_unflags}
Te6edf3build_flags Tff7b72=
Te6edf3${envTff7b72:Ta5d6ffembedded-nrf52-minimal.build_flags}
Te6edf3-DBOARD_MODELTff7b72=Ta5d6ffBOARD_RAK3401
Te6edf3-DHAS_GPIO
Te6edf3-DHAS_BME
T8b949e; CBA TEST
T8b949e;-UNDEBUG
T8b949e;-DRNS_DEFAULT_ALLOCATOR=RNS_HEAP_ALLOCATOR
Te6edf3-DRNS_DEFAULT_ALLOCATORTff7b72=Ta5d6ffRNS_HEAP_POOL_ALLOCATOR
T8b949e;-DRNS_CONTAINER_ALLOCATOR=RNS_HEAP_ALLOCATOR
Te6edf3-DRNS_CONTAINER_ALLOCATORTff7b72=Ta5d6ffRNS_HEAP_POOL_ALLOCATOR
Te6edf3-DRNS_HEAP_POOL_BUFFER_SIZETff7b72=Ta5d6ff131072
T8b949e;-DRNS_HEAP_POOL_BUFFER_SIZE=65536
T8b949e;-UHAS_RNS
Te6edf3-DUSTORE_ENABLE_LOG
Te6edf3-DUSTORE_USE_INTERNALFS
Te6edf3-DUSTORE_USE_FLASHFS
Te6edf3-DURTN_PATH_TABLE_MAX_RECSTff7b72=Ta5d6ff25
Te6edf3-DRNS_PATH_TABLE_SEGMENT_SIZETff7b72=Ta5d6ff2048 T8b949e; 2 KB
Te6edf3-DRNS_PATH_TABLE_SEGMENT_COUNTTff7b72=Ta5d6ff6
Te6edf3lib_deps Tff7b72=
Te6edf3${envTff7b72:Ta5d6ffembedded-nrf52.lib_deps}
Te6edf3microStoreTff7b72=Ta5d6ffsymlink://../microStore
Te6edf3microReticulumTff7b72=Ta5d6ffsymlink://../microReticulum
Te6edf3adafruit/SdFat - Adafruit Fork
T8b949e;https://github.com/attermann/Adafruit_SPIFlash#littlefs
Te6edf3Adafruit_SPIFlashTff7b72=Ta5d6ffsymlink://../Adafruit_SPIFlash
Te6edf3adafruit/Adafruit BME680 Library@^2.0.6
Te6edf3upload_protocol Tff7b72= Ta5d6ffnrfutil

T8b949e; MCU: Nordic nRF52840 (32-bit ARM Cortex-M4, 64 MHz)
T8b949e; SRAM: 256 KB
T8b949e; PSRAM: N/A
T8b949e; Flash: 1 MB internal
T8b949e; External Flash Interface: N/A
T8b949e; LoRa: Semtech SX1262
T8b949e; NOTE: Must double-click RESET button (top-left) to enter DFU mode before uploading firmware
Tff7b72[env:lilygo-t-echo-local]
Te6edf3extends Tff7b72= Ta5d6ffenv:embedded-nrf52-minimal
Te6edf3platform Tff7b72= Ta5d6ffnordicnrf52
Te6edf3board Tff7b72= Ta5d6ffnrf52840_dk_adafruit
Te6edf3custom_variant Tff7b72= Ta5d6fftecho_local
Te6edf3board_build.partitions Tff7b72= Ta5d6ffno_ota.csv
Te6edf3board_build.filesystem Tff7b72= Ta5d6fflittlefs
T8b949e; Required so the linker pulls in Adafruit_TinyUSB_API.cpp's strong definition
T8b949e; of TinyUSB_Device_Init() — declared weak in the BSP header, so without this
T8b949e; the BSP's call to it from loop_task() gets patched to a no-op and USB CDC
T8b949e; never initializes.
Te6edf3lib_archive Tff7b72= Ta5d6ffno
Te6edf3build_unflags Tff7b72=
Te6edf3${envTff7b72:Ta5d6ffembedded-nrf52-minimal.build_unflags}
Te6edf3build_flags Tff7b72=
Te6edf3${envTff7b72:Ta5d6ffembedded-nrf52-minimal.build_flags}
Te6edf3-DBOARD_MODELTff7b72=Ta5d6ffBOARD_TECHO
T8b949e; CBA The heap pool allocator is what was causing the board to fail to boot due to very early static init failure
Te6edf3-DRNS_DEFAULT_ALLOCATORTff7b72=Ta5d6ffRNS_HEAP_POOL_ALLOCATOR
T8b949e;-DRNS_HEAP_POOL_BUFFER_SIZE=131072
Te6edf3-DRNS_HEAP_POOL_BUFFER_SIZETff7b72=Ta5d6ff98304
Te6edf3-DUSTORE_ENABLE_LOG
Te6edf3-DUSTORE_USE_INTERNALFS
Te6edf3-DURTN_PATH_TABLE_MAX_RECSTff7b72=Ta5d6ff25
Te6edf3-DRNS_PATH_TABLE_SEGMENT_SIZETff7b72=Ta5d6ff2048 T8b949e; 2 KB
Te6edf3-DRNS_PATH_TABLE_SEGMENT_COUNTTff7b72=Ta5d6ff6
Te6edf3lib_deps Tff7b72=
Te6edf3${envTff7b72:Ta5d6ffembedded-nrf52.lib_deps}
Te6edf3httpsTff7b72:Ta5d6ff//github.com/liamcottle/esp8266-oled-ssd1306T8b949e#e16cee124fe26490cb14880c679321ad8ac89c95
Te6edf3adafruit/Adafruit NeoPixel@^1.12.0
Te6edf3zinggjm/GxEPD2@^1.6.9
Te6edf3microStoreTff7b72=Ta5d6ffsymlink://../microStore
Te6edf3microReticulumTff7b72=Ta5d6ffsymlink://../microReticulum
Te6edf3upload_protocol Tff7b72= Ta5d6ffnrfutil
Te6edf3upload_port Tff7b72= Ta5d6ff/dev/cu.usbmodem101
T8b949e;upload_speed = 460800

T8b949e; MCU: Nordic nRF52840 (32-bit ARM Cortex-M4, 64 MHz)
T8b949e; SRAM: 256 KB
T8b949e; PSRAM: N/A
T8b949e; Flash: 1 MB internal
T8b949e; External Flash Interface: N/A
T8b949e; LoRa: Semtech SX1262
Tff7b72[env:heltec_t114-local]
Te6edf3extends Tff7b72= Ta5d6ffenv:embedded-nrf52-minimal
T8b949e;upload_port = /dev/cu.usbmodem1101
Te6edf3platform Tff7b72= Ta5d6ffnordicnrf52
T8b949e;board = nrf52840_dk_adafruit
Te6edf3board Tff7b72= Ta5d6ffnrf52840_dk
Te6edf3custom_variant Tff7b72= Ta5d6ffheltec_t114_local
T8b949e;board_build.partitions = no_ota.csv
Te6edf3board_build.filesystem Tff7b72= Ta5d6fflittlefs
Te6edf3build_unflags Tff7b72=
Te6edf3${envTff7b72:Ta5d6ffembedded-nrf52-minimal.build_unflags}
Te6edf3build_flags Tff7b72=
Te6edf3${envTff7b72:Ta5d6ffembedded-nrf52-minimal.build_flags}
Te6edf3-DBOARD_MODELTff7b72=Ta5d6ffBOARD_HELTEC_T114
T8b949e; CBA TEST
Te6edf3-DRNS_DEFAULT_ALLOCATORTff7b72=Ta5d6ffRNS_HEAP_POOL_ALLOCATOR
Te6edf3-DRNS_HEAP_POOL_BUFFER_SIZETff7b72=Ta5d6ff204800
Te6edf3-DUSTORE_ENABLE_LOG
Te6edf3-DUSTORE_USE_INTERNALFS
Te6edf3-DURTN_PATH_TABLE_MAX_RECSTff7b72=Ta5d6ff25
Te6edf3-DRNS_PATH_TABLE_SEGMENT_SIZETff7b72=Ta5d6ff2048 T8b949e; 2 KB
Te6edf3-DRNS_PATH_TABLE_SEGMENT_COUNTTff7b72=Ta5d6ff6
Te6edf3lib_deps Tff7b72=
Te6edf3${envTff7b72:Ta5d6ffembedded-nrf52.lib_deps}
Te6edf3httpsTff7b72:Ta5d6ff//github.com/liamcottle/esp8266-oled-ssd1306T8b949e#e16cee124fe26490cb14880c679321ad8ac89c95
Te6edf3adafruit/Adafruit NeoPixel@^1.12.0
Te6edf3microStoreTff7b72=Ta5d6ffsymlink://../microStore
Te6edf3microReticulumTff7b72=Ta5d6ffsymlink://../microReticulum



T8b949e; =======================================================================
T8b949e; Native build targets — both backed by Portduino as a normal lib_dep.
T8b949e;
T8b949e; [env:native-macos] Portduino's built-in simulated mode (SimHardwareSPI
T8b949e; returns zeros). Dev iteration target — builds on
T8b949e; macOS without any radio hardware attached.
T8b949e;
T8b949e; [env:native] Portduino's Linux backend (libgpiod + /dev/spidev).
T8b949e; Real Reticulum transport daemon for RPi/FemtoFox.
T8b949e; Linux-only — the libgpiod path needs a real Linux
T8b949e; kernel.
T8b949e;
T8b949e; Both share the same lib_deps; Portduino's own #ifdef __linux__ guards
T8b949e; select simulated-vs-real impls based on the host OS at compile time.
T8b949e; =======================================================================
Tff7b72[env:native-macos-local]
T8b949e;platform = https://github.com/meshtastic/platform-native.git
T8b949e;platform = https://github.com/meshtastic/platform-native.git#cab4b21
Te6edf3platform Tff7b72= Ta5d6ffhttps://github.com/meshtastic/platform-native/archive/cab4b21d902973e43c938dab3cf4844ba02547ec.zip
Te6edf3framework Tff7b72= Ta5d6ffarduino
Te6edf3board Tff7b72= Ta5d6ffcross_platform
Te6edf3custom_variant Tff7b72= Ta5d6ffnative-macos
Te6edf3extra_scripts Tff7b72=
Te6edf3preTff7b72:Ta5d6ffnative/macos_pre_build.py
Te6edf3preTff7b72:Ta5d6ffextra_script.py
T8b949e; Launch with no Reticulum interfaces — no LoRa modem driver, no Portduino
T8b949e; SPI activity. Future UDPInterface support will land separately.
Te6edf3build_unflags Tff7b72=
Te6edf3${env.build_unflags}
Te6edf3build_flags Tff7b72=
Te6edf3${env.build_flags}
Te6edf3-UNDEBUG
Te6edf3-URNS_LOW_MEMORY_REBOOT
Te6edf3-URNS_DEBUG_HEAP
Te6edf3-URNS_DEBUG_MEMORY
Te6edf3-ULORA_TRANSPORT
Te6edf3-DBOARD_MODELTff7b72=Ta5d6ffBOARD_NATIVE_LINUX
Te6edf3-DMCU_VARIANTTff7b72=Ta5d6ffMCU_NATIVE
T8b949e; All three modem drivers compile in; the runtime-selected one is
T8b949e; picked from rnoded.conf's `modem = ...` field.
Te6edf3-DMODEMTff7b72=Ta5d6ffMODEM_RUNTIME
T8b949e; Compile in the SX126x TCXO code path so deployments on HATs with a
T8b949e; DIO3-powered TCXO (RAK13302, etc.) work without a custom build. The
T8b949e; opcode is only actually emitted at runtime if rnoded.conf sets
T8b949e; dio3_tcxo_voltage to a non-zero voltage (or `true`); leave it unset
T8b949e; for XTAL-only boards. ENABLE_TCXO is the supported way to flip the
T8b949e; HAS_TCXO compile-time gate to true — see Boards.h:189-191.
Te6edf3-DENABLE_TCXO
T8b949e; Skip eeprom_checksum_valid() in validate_status() — native builds
T8b949e; self-provision via PinMap.cpp::seed_eeprom_if_unprovisioned() and
T8b949e; don't compute the rnodeconf-style MD5. Lock / product / model /
T8b949e; hwrev checks are satisfied by the seeded bytes.
Te6edf3-DDISABLE_FIRMWARE_CHECKSUM
Te6edf3-DUSTORE_ENABLE_LOG
Te6edf3-DUSTORE_USE_POSIXFSTff7b72=Ta5d6ff1
Te6edf3-DURTN_PATH_TABLE_MAX_RECSTff7b72=Ta5d6ff2000
Te6edf3-DRNS_PATH_TABLE_SEGMENT_SIZETff7b72=Ta5d6ff98304 T8b949e; 96 KB
Te6edf3-DRNS_PATH_TABLE_SEGMENT_COUNTTff7b72=Ta5d6ff8
T8b949e; argp-standalone provides argp.h on macOS (which Apple's libc lacks).
T8b949e; brew install argp-standalone before running this env. Both -I and
T8b949e; -L plus -largp go through build_flags since PlatformIO doesn't have
T8b949e; a separate link-flags key for the native platform.
Te6edf3-I/opt/homebrew/include
Te6edf3-L/opt/homebrew/lib
Te6edf3-largp
T8b949e; KISS-over-WebSocket console — same flag as [env:embedded], duplicated
T8b949e; here because [env:native-macos] doesn't extend [env:embedded].
Te6edf3-DENABLE_WEBSOCKETS
Te6edf3-Inative/ws_shims
T8b949e; Re-include native/ (excluded by default at [env] level so its EEPROM
T8b949e; shim doesn't collide with the Arduino-ESP32 framework EEPROM global on
T8b949e; embedded builds). The .ino → .cpp conversion uses PlatformIO's normal
T8b949e; flow; native/macos_pre_build.py monkey-patches it to call Homebrew g++.
Te6edf3build_src_filter Tff7b72=
Te6edf3${env.build_src_filter}
Te6edf3+<native/>
Te6edf3lib_deps Tff7b72=
Te6edf3${env.lib_deps}
Te6edf3microStoreTff7b72=Ta5d6ffsymlink://../microStore
Te6edf3microReticulumTff7b72=Ta5d6ffsymlink://../microReticulum

Tff7b72[env:native]
T8b949e;platform = https://github.com/meshtastic/platform-native.git
T8b949e;platform = https://github.com/meshtastic/platform-native.git#cab4b21
Te6edf3platform Tff7b72= Ta5d6ffhttps://github.com/meshtastic/platform-native/archive/cab4b21d902973e43c938dab3cf4844ba02547ec.zip
Te6edf3framework Tff7b72= Ta5d6ffarduino
Te6edf3board Tff7b72= Ta5d6fflinux_hardware
Te6edf3custom_variant Tff7b72= Ta5d6ffnative
Te6edf3build_unflags Tff7b72=
Te6edf3${env.build_unflags}
Te6edf3build_flags Tff7b72=
Te6edf3${env.build_flags}
Te6edf3-lgpiod ; link with gpiod lib for Portduino
Te6edf3-Wno-psabi ; disable iterator param passing warning
Te6edf3-UNDEBUG
Te6edf3-URNS_LOW_MEMORY_REBOOT
Te6edf3-URNS_DEBUG_HEAP
Te6edf3-URNS_DEBUG_MEMORY
Te6edf3-DBOARD_MODELTff7b72=Ta5d6ffBOARD_NATIVE_LINUX
Te6edf3-DMCU_VARIANTTff7b72=Ta5d6ffMCU_NATIVE
T8b949e; All three modem drivers compile in; the runtime-selected one is
T8b949e; picked from rnoded.conf's `modem = ...` field.
Te6edf3-DMODEMTff7b72=Ta5d6ffMODEM_RUNTIME
T8b949e; Compile in the SX126x TCXO code path. See [env:native-macos] above
T8b949e; for the rationale; actual TCXO enablement is gated at runtime on
T8b949e; rnoded.conf's dio3_tcxo_voltage. ENABLE_TCXO is the supported way
T8b949e; to flip Boards.h's HAS_TCXO compile-time gate to true.
Te6edf3-DENABLE_TCXO
T8b949e; Skip the rnodeconf-style MD5 checksum check in validate_status(),
T8b949e; same rationale as [env:native-macos].
Te6edf3-DDISABLE_FIRMWARE_CHECKSUM
Te6edf3-DUSTORE_USE_POSIXFSTff7b72=Ta5d6ff1
Te6edf3-DURTN_PATH_TABLE_MAX_RECSTff7b72=Ta5d6ff2000
Te6edf3-DRNS_PATH_TABLE_SEGMENT_SIZETff7b72=Ta5d6ff98304 T8b949e; 96 KB
Te6edf3-DRNS_PATH_TABLE_SEGMENT_COUNTTff7b72=Ta5d6ff8
T8b949e; KISS-over-WebSocket console — same flag as [env:embedded] and
T8b949e; [env:native-macos]; duplicated because [env:native] doesn't extend
T8b949e; [env:embedded].
Te6edf3-DENABLE_WEBSOCKETS
Te6edf3-Inative/ws_shims
T8b949e; Re-include native/ (same rationale as native-macos). On Linux, PIO's
T8b949e; standard .ino converter (which uses real gcc) works without the
T8b949e; macOS-specific Homebrew gcc workaround.
Te6edf3build_src_filter Tff7b72=
Te6edf3${env.build_src_filter}
Te6edf3+<native/>
Te6edf3lib_deps Tff7b72=
Te6edf3${env.lib_deps}
Te6edf3httpsTff7b72:Ta5d6ff//github.com/attermann/microStore.git
Te6edf3httpsTff7b72:Ta5d6ff//github.com/attermann/microReticulum.git

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